qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer.

Age	Commit message (Expand)	Author
2019-06-01	target/mips: Improve performance of certain MSA instructions	Mateja Marjanovic
2019-06-01	target/mips: Clean up lmi_helper.c	Aleksandar Markovic
2019-06-01	target/mips: Clean up dsp_helper.c	Aleksandar Markovic
2019-06-01	target/mips: Add emulation of MMI instruction PCPYUD	Mateja Marjanovic
2019-06-01	target/mips: Add emulation of MMI instruction PCPYLD	Mateja Marjanovic
2019-06-01	target/mips: Add emulation of MMI instruction PCPYH	Mateja Marjanovic
2019-05-28	Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-next-280519-2...	Peter Maydell
2019-05-28	target/mips: convert UHI_plog to use common semihosting code	Alex Bennée
2019-05-28	target/mips: only build mips-semi for softmmu	Alex Bennée
2019-05-28	semihosting: move semihosting configuration into its own directory	Alex Bennée
2019-05-26	target/mips: realign comments to fix checkpatch warnings	Jules Irenge
2019-05-26	target/mips: add or remove space to fix checkpatch errors	Jules Irenge
2019-05-26	mips: Decide to map PAGE_EXEC in map_address	Jakub Jermář
2019-05-26	target/mips: Refactor and fix INSERT.<B\|H\|W\|D> instructions	Mateja Marjanovic
2019-05-26	target/mips: Refactor and fix COPY_U.<B\|H\|W> instructions	Mateja Marjanovic
2019-05-26	target/mips: Refactor and fix COPY_S.<B\|H\|W\|D> instructions	Mateja Marjanovic
2019-05-26	target/mips: Fix MSA instructions ST.<B\|H\|W\|D> on big endian host	Mateja Marjanovic
2019-05-26	target/mips: Fix MSA instructions LD.<B\|H\|W\|D> on big endian host	Mateja Marjanovic
2019-05-26	target/mips: Make the results of MOD_<U\|S>.<B\|H\|W\|D> the same as on hardware	Mateja Marjanovic
2019-05-26	target/mips: Make the results of DIV_<U\|S>.<B\|H\|W\|D> the same as on hardware	Mateja Marjanovic
2019-05-10	tcg: Use CPUClass::tlb_fill in cputlb.c	Richard Henderson
2019-05-10	target/mips: Convert to CPUClass::tlb_fill	Richard Henderson
2019-05-10	target/mips: Tidy control flow in mips_cpu_handle_mmu_fault	Richard Henderson
2019-05-10	target/mips: Pass a valid error to raise_mmu_exception for user-only	Richard Henderson
2019-04-24	tcg: Hoist max_insns computation to tb_gen_code	Richard Henderson
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster
2019-04-18	target: Simplify how the TARGET_cpu_list() print	Markus Armbruster
2019-03-22	trace-events: Shorten file names in comments	Markus Armbruster
2019-02-27	target/mips: Preparing for adding MMI instructions	Mateja Marjanovic
2019-02-21	target/mips: implement QMP query-cpu-definitions command	Pavel Dovgalyuk
2019-02-14	target/mips: introduce MTTCG-enabled builds	Aleksandar Markovic
2019-02-14	target/mips: hold BQL in mips_vpe_wake()	Goran Ferenc
2019-02-14	hw/mips_int: hold BQL for all interrupt requests	Aleksandar Markovic
2019-02-14	target/mips: reimplement SC instruction emulation and use cmpxchg	Leon Alrae
2019-02-14	target/mips: compare virtual addresses in LL/SC sequence	Leon Alrae
2019-01-24	target/mips: Add I6500 core configuration	Yongbok Kim
2019-01-24	target/mips: nanoMIPS: Fix branch handling	Stefan Markovic
2019-01-24	target/mips: Extend gen_scwp() functionality to support EVA	Aleksandar Markovic
2019-01-24	target/mips: Correct the second argument type of cpu_supports_isa()	Aleksandar Markovic
2019-01-24	target/mips: nanoMIPS: Rename macros for extracting 3-bit-coded GPR numbers	Aleksandar Markovic
2019-01-24	target/mips: nanoMIPS: Remove an unused macro	Aleksandar Markovic
2019-01-24	target/mips: nanoMIPS: Remove duplicate macro definitions	Aleksandar Markovic
2019-01-18	target/mips: Introduce 32 R5900 multimedia registers	Fredrik Noring
2019-01-18	target/mips: Rename 'rn' to 'register_name'	Aleksandar Markovic
2019-01-18	target/mips: Add CP0 register MemoryMapID	Aleksandar Markovic
2019-01-18	target/mips: Amend preprocessor constants for CP0 registers	Aleksandar Markovic
2019-01-18	target/mips: Update ITU to utilize SAARI and SAAR CP0 registers	Yongbok Kim
2019-01-18	target/mips: Provide R/W access to SAARI and SAAR CP0 registers	Yongbok Kim
2019-01-18	target/mips: Add fields for SAARI and SAAR CP0 registers	Yongbok Kim
2019-01-18	target/mips: Use preprocessor constants for 32 major CP0 registers	Aleksandar Markovic