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QEMU is a generic and open source machine & userspace emulator and virtualizer.
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2020-10-17
target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64)
Philippe Mathieu-Daudé
2020-10-17
target/mips/cpu: Display warning when CPU is used without input clock
Philippe Mathieu-Daudé
2020-10-17
target/mips/cpu: Introduce mips_cpu_create_with_clock() helper
Philippe Mathieu-Daudé
2020-10-17
target/mips/cpu: Allow the CPU to use dynamic frequencies
Philippe Mathieu-Daudé
2020-10-17
target/mips/cpu: Make cp0_count_rate a property
Philippe Mathieu-Daudé
2020-10-17
target/mips/cpu: Calculate the CP0 timer period using the CPU frequency
Philippe Mathieu-Daudé
2020-10-17
target/mips: Move cp0_count_ns to CPUMIPSState
Philippe Mathieu-Daudé
2020-10-17
target/mips/cp0_timer: Document TIMER_PERIOD origin
Philippe Mathieu-Daudé
2020-10-17
target/mips/cp0_timer: Explicit unit in variable name
Philippe Mathieu-Daudé
2020-10-17
target/mips: Move cpu_mips_get_random() with CP0 helpers
Philippe Mathieu-Daudé
2020-10-17
target/mips/op_helper: Log unimplemented cache opcode
Philippe Mathieu-Daudé
2020-10-17
target/mips/op_helper: Document Invalidate/Writeback opcodes as no-op
Philippe Mathieu-Daudé
2020-10-17
target/mips/op_helper: Convert multiple if() to switch case
Philippe Mathieu-Daudé
2020-10-17
target/mips: Add loongson-ext lsdc2 group of instructions
Jiaxun Yang
2020-10-17
target/mips: Add loongson-ext lswc2 group of instructions (Part 2)
Jiaxun Yang
2020-10-17
target/mips: Add loongson-ext lswc2 group of instructions (Part 1)
Jiaxun Yang
2020-10-17
target/mips: Demacro helpers for <MAX|MAXA|MIN|MINA>.<D|S>
Aleksandar Markovic
2020-10-17
target/mips: Demacro helpers for M<ADD|SUB>F.<D|S>
Aleksandar Markovic
2020-10-17
target/mips: Demacro helpers for <ABS|CHS>.<D|S|PS>
Aleksandar Markovic
2020-10-17
target/mips: Fix some comment spelling errors
zhaolichang
2020-09-18
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
Eduardo Habkost
2020-09-12
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-fixes-100920-...
Peter Maydell
2020-09-10
target/mips: simplify gen_compute_imm_branch logic
Alex Bennée
2020-09-09
Use OBJECT_DECLARE_TYPE where possible
Eduardo Habkost
2020-09-09
Use DECLARE_*CHECKER* macros
Eduardo Habkost
2020-09-09
Move QOM typedefs and add missing includes
Eduardo Habkost
2020-08-21
meson: target
Paolo Bonzini
2020-08-21
meson: rename included C source files to .c.inc
Paolo Bonzini
2020-08-21
trace: switch position of headers to what Meson requires
Paolo Bonzini
2020-07-14
target/mips: Fix ADD.S FPU instruction
Alex Richardson
2020-07-14
target/mips: Remove identical if/else branches
Aleksandar Markovic
2020-06-27
hw/mips: Implement the kvm_type() hook in MachineClass
Huacai Chen
2020-06-15
target/mips: msa: Split helpers for MULV.<B|H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for SUBV.<B|H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for SUBSUU_S.<B|H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for SUBSUS_U.<B|H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for SUBS_U.<B|H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for SUBS_S.<B|H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for DOTP_U.<H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for DOTP_S.<H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for DPSUB_U.<H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for DPSUB_S.<H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for DPADD_U.<H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for DPADD_S.<H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for MSUBV.<B|H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: msa: Split helpers for MADDV.<B|H|W|D>
Aleksandar Markovic
2020-06-15
target/mips: Add comments for vendor-specific ASEs
Jiaxun Yang
2020-06-15
target/mips: Legalize Loongson insn flags
Jiaxun Yang
2020-06-09
target/mips: Enable hardware page table walker and CMGCR features for P5600
Andrea Oliveri
2020-06-09
target/mips: Add Loongson-3 CPU definition
Huacai Chen
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