summaryrefslogtreecommitdiff
path: root/target/mips
AgeCommit message (Expand)Author
2020-10-17target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64)Philippe Mathieu-Daudé
2020-10-17target/mips/cpu: Display warning when CPU is used without input clockPhilippe Mathieu-Daudé
2020-10-17target/mips/cpu: Introduce mips_cpu_create_with_clock() helperPhilippe Mathieu-Daudé
2020-10-17target/mips/cpu: Allow the CPU to use dynamic frequenciesPhilippe Mathieu-Daudé
2020-10-17target/mips/cpu: Make cp0_count_rate a propertyPhilippe Mathieu-Daudé
2020-10-17target/mips/cpu: Calculate the CP0 timer period using the CPU frequencyPhilippe Mathieu-Daudé
2020-10-17target/mips: Move cp0_count_ns to CPUMIPSStatePhilippe Mathieu-Daudé
2020-10-17target/mips/cp0_timer: Document TIMER_PERIOD originPhilippe Mathieu-Daudé
2020-10-17target/mips/cp0_timer: Explicit unit in variable namePhilippe Mathieu-Daudé
2020-10-17target/mips: Move cpu_mips_get_random() with CP0 helpersPhilippe Mathieu-Daudé
2020-10-17target/mips/op_helper: Log unimplemented cache opcodePhilippe Mathieu-Daudé
2020-10-17target/mips/op_helper: Document Invalidate/Writeback opcodes as no-opPhilippe Mathieu-Daudé
2020-10-17target/mips/op_helper: Convert multiple if() to switch casePhilippe Mathieu-Daudé
2020-10-17target/mips: Add loongson-ext lsdc2 group of instructionsJiaxun Yang
2020-10-17target/mips: Add loongson-ext lswc2 group of instructions (Part 2)Jiaxun Yang
2020-10-17target/mips: Add loongson-ext lswc2 group of instructions (Part 1)Jiaxun Yang
2020-10-17target/mips: Demacro helpers for <MAX|MAXA|MIN|MINA>.<D|S>Aleksandar Markovic
2020-10-17target/mips: Demacro helpers for M<ADD|SUB>F.<D|S>Aleksandar Markovic
2020-10-17target/mips: Demacro helpers for <ABS|CHS>.<D|S|PS>Aleksandar Markovic
2020-10-17target/mips: Fix some comment spelling errorszhaolichang
2020-09-18qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost
2020-09-12Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-fixes-100920-...Peter Maydell
2020-09-10target/mips: simplify gen_compute_imm_branch logicAlex Bennée
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost
2020-08-21meson: targetPaolo Bonzini
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini
2020-08-21trace: switch position of headers to what Meson requiresPaolo Bonzini
2020-07-14target/mips: Fix ADD.S FPU instructionAlex Richardson
2020-07-14target/mips: Remove identical if/else branchesAleksandar Markovic
2020-06-27hw/mips: Implement the kvm_type() hook in MachineClassHuacai Chen
2020-06-15target/mips: msa: Split helpers for MULV.<B|H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for SUBV.<B|H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for SUBSUU_S.<B|H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for SUBSUS_U.<B|H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for SUBS_U.<B|H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for SUBS_S.<B|H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for DOTP_U.<H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for DOTP_S.<H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for DPSUB_U.<H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for DPSUB_S.<H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for DPADD_U.<H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for DPADD_S.<H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for MSUBV.<B|H|W|D>Aleksandar Markovic
2020-06-15target/mips: msa: Split helpers for MADDV.<B|H|W|D>Aleksandar Markovic
2020-06-15target/mips: Add comments for vendor-specific ASEsJiaxun Yang
2020-06-15target/mips: Legalize Loongson insn flagsJiaxun Yang
2020-06-09target/mips: Enable hardware page table walker and CMGCR features for P5600Andrea Oliveri
2020-06-09target/mips: Add Loongson-3 CPU definitionHuacai Chen