qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer.

Age	Commit message (Expand)	Author
2021-02-21	target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType	Philippe Mathieu-Daudé
2021-02-21	target/mips: Let cpu_mips_translate_address() take MMUAccessType arg	Philippe Mathieu-Daudé
2021-02-21	target/mips: Remove access_type argument from map_address() handler	Philippe Mathieu-Daudé
2021-01-14	target/mips: Move msa_reset() to msa_helper.c	Philippe Mathieu-Daudé
2021-01-14	target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA	Philippe Mathieu-Daudé
2021-01-14	target/mips: Move mmu_init() functions to tlb_helper.c	Philippe Mathieu-Daudé
2021-01-14	target/mips: Move common helpers from helper.c to cpu.c	Philippe Mathieu-Daudé
2021-01-14	target/mips: Extract FPU helpers to 'fpu_helper.h'	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1	Philippe Mathieu-Daudé
2021-01-14	target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6	Philippe Mathieu-Daudé
2020-12-13	target/mips: Use FloatRoundMode enum for FCR31 modes conversion	Philippe Mathieu-Daudé
2020-12-13	target/mips: Move cpu definitions, reset() and realize() to cpu.c	Philippe Mathieu-Daudé
2020-12-13	target/mips: Explicit Release 6 MMU types	Philippe Mathieu-Daudé
2020-12-13	target/mips: Include "exec/memattrs.h" in 'internal.h'	Philippe Mathieu-Daudé
2020-10-17	target/mips: Move cpu_mips_get_random() with CP0 helpers	Philippe Mathieu-Daudé
2020-10-17	target/mips: Fix some comment spelling errors	zhaolichang
2020-06-09	target/mips: Add Loongson-3 CPU definition	Huacai Chen
2020-06-09	target/mips: fpu: Refactor conversion from ieee to mips exception flags	Aleksandar Markovic
2020-03-17	gdbstub: extend GByteArray to read register helpers	Alex Bennée
2020-01-29	target/mips: Add implementation of GINVT instruction	Yongbok Kim
2019-10-01	target/mips: Clean up internal.h	Aleksandar Markovic
2019-09-12	target/mips: Switch to do_transaction_failed() hook	Peter Maydell
2019-08-19	target/mips: rationalise softfloat includes	Alex Bennée
2019-08-16	migration: Move the VMStateDescription typedef to typedefs.h	Markus Armbruster
2019-05-10	target/mips: Convert to CPUClass::tlb_fill	Richard Henderson
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster
2019-01-18	target/mips: Provide R/W access to SAARI and SAAR CP0 registers	Yongbok Kim
2018-10-18	target/mips: Implement hardware page table walker for MIPS32	Yongbok Kim
2018-10-18	target/mips: Improve DSP R2/R3-related naming	Stefan Markovic
2018-10-18	target/mips: Add availability control for DSP R3 ASE	Stefan Markovic
2018-10-18	target/mips: Increase 'supported ISAs/ASEs' flag holder size	Philippe Mathieu-Daudé
2018-01-25	accel/tcg: add size paremeter in tlb_fill()	Laurent Vivier
2017-09-21	mips: MIPSCPU model subclasses	Igor Mammedov
2017-09-21	mips: split cpu_mips_realize_env() out of cpu_mips_init()	Philippe Mathieu-Daudé
2017-09-21	mips: introduce internal.h and cleanup cpu.h	Philippe Mathieu-Daudé