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path: root/target/microblaze/helper.c
AgeCommit message (Expand)Author
2020-09-01target/microblaze: Remove empty D macrosRichard Henderson
2020-09-01target/microblaze: Split out MSR[C] to its own variableRichard Henderson
2020-09-01target/microblaze: Fix width of ESRRichard Henderson
2020-09-01target/microblaze: Fix width of MSRRichard Henderson
2020-09-01target/microblaze: Fix width of PC and BTARGETRichard Henderson
2020-09-01target/microblaze: Split out BTR from env->sregsRichard Henderson
2020-09-01target/microblaze: Split out ESR from env->sregsRichard Henderson
2020-09-01target/microblaze: Split out EAR from env->sregsRichard Henderson
2020-09-01target/microblaze: Split out MSR from env->sregsRichard Henderson
2020-09-01target/microblaze: Split out PC from env->sregsRichard Henderson
2019-05-10tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson
2019-05-10target/microblaze: Convert to CPUClass::tlb_fillRichard Henderson
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster
2018-05-29target-microblaze: Consolidate MMU enabled checksEdgar E. Iglesias
2018-05-29target-microblaze: Make special registers 64-bitEdgar E. Iglesias
2018-05-29target-microblaze: Bypass MMU with MMU_NOMMU_IDXEdgar E. Iglesias
2018-05-29target-microblaze: Remove USE_MMU PVR checksEdgar E. Iglesias
2018-05-29target-microblaze: Tighten up TCGv_i32 vs TCGv type usageEdgar E. Iglesias
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier
2016-12-20Move target-* CPU file into a target/ folderThomas Huth