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AgeCommit message (Expand)Author
2017-07-31m68k/translate: fix incorrect copy/pastePhilippe Mathieu-Daudé
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova
2017-07-19target/m68k: optimize bcd_flags() using extract opPhilippe Mathieu-Daudé
2017-06-29target/m68k: add fmovemLaurent Vivier
2017-06-29target/m68k: add explicit single and double precision operations (part 2)Laurent Vivier
2017-06-29target/m68k: add fsglmul and fsgldivLaurent Vivier
2017-06-29target/m68k: add explicit single and double precision operationsLaurent Vivier
2017-06-29target/m68k: add fmovecrLaurent Vivier
2017-06-29target/m68k: add fscc.Laurent Vivier
2017-06-21target-m68k: add FPCR and FPSRLaurent Vivier
2017-06-21target-m68k: define 96bit FP registers for gdb on 680x0Laurent Vivier
2017-06-21target-m68k: use floatx80 internallyLaurent Vivier
2017-06-21target-m68k: initialize FPU registersLaurent Vivier
2017-06-21target-m68k: move fmove CR to a functionLaurent Vivier
2017-06-15target-m68k: define ext_opsizeLaurent Vivier
2017-06-15target-m68k: move FPU helpers to fpu_helper.cLaurent Vivier
2017-06-15target/m68k: fix V flag for CC_OP_SUBxLaurent Vivier
2017-06-07target/m68k: implement rtdLaurent Vivier
2017-01-16Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-...Peter Maydell
2017-01-14target-m68k: increment/decrement with SPLaurent Vivier
2017-01-14target-m68k: CAS doesn't need aligned accessLaurent Vivier
2017-01-14target-m68k: manage pre-dec et post-inc in CASLaurent Vivier
2017-01-14target-m68k: fix gen_flush_flags()Laurent Vivier
2017-01-14target-m68k: fix bit operation with immediate valueLaurent Vivier
2017-01-14target-m68k: Implement bfffoRichard Henderson
2017-01-14target-m68k: Implement bitfield ops for memoryRichard Henderson
2017-01-14target-m68k: Implement bitfield ops for registersRichard Henderson
2017-01-13qom/cpu: move tlb_flush to cpu_common_resetAlex Bennée
2016-12-27target-m68k: free TCG variables that are notLaurent Vivier
2016-12-27target-m68k: add rol/ror/roxl/roxr instructionsLaurent Vivier
2016-12-27target-m68k: Inline shiftsRichard Henderson
2016-12-27target-m68k: Do not cpu_abort on undefined insnsRichard Henderson
2016-12-27target-m68k: Implement 680x0 movemLaurent Vivier
2016-12-27target-m68k: add cas/cas2 opsLaurent Vivier
2016-12-27target-m68k: add abcd/sbcd/nbcdLaurent Vivier
2016-12-27target-m68k: add 680x0 divu/divs variantsLaurent Vivier
2016-12-27target-m68k: add 64bit mullLaurent Vivier
2016-12-27target-m68k: add cmpmLaurent Vivier
2016-12-27target-m68k: Split gen_lea and gen_eaRichard Henderson
2016-12-27target-m68k: Delay autoinc writebackRichard Henderson
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
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