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path: root/target/i386/tcg
AgeCommit message (Expand)Author
2021-09-14target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folderPhilippe Mathieu-Daudé
2021-09-14target/i386: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé
2021-09-14accel/tcg: Rename user-mode do_interrupt hack as fake_user_interruptPhilippe Mathieu-Daudé
2021-09-14target/i386: Simplify TARGET_X86_64 #ifdef'ryPhilippe Mathieu-Daudé
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich
2021-09-13target/i386: Added vVMLOAD and vVMSAVE featureLara Lazier
2021-09-13target/i386: Added changed priority check for VIRQLara Lazier
2021-09-13target/i386: Added ignore TPR check in ctl_has_irqLara Lazier
2021-09-13target/i386: Added VGIF V_IRQ masking capabilityLara Lazier
2021-09-13target/i386: Moved int_ctl into CPUX86State structureLara Lazier
2021-09-13target/i386: Added VGIF featureLara Lazier
2021-09-13target/i386: VMRUN and VMLOAD canonicalizationsLara Lazier
2021-08-13target/i386: Fixed size of constant for WindowsLara Lazier
2021-07-29target/i386: fix typo in ctl_has_irqPaolo Bonzini
2021-07-29target/i386: Added consistency checks for event injectionLara Lazier
2021-07-23i386: do not call cpudef-only models functions for max, host, baseClaudio Fontana
2021-07-23target/i386: Added consistency checks for CR3Lara Lazier
2021-07-22Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell
2021-07-22target/i386: Added consistency checks for EFERLara Lazier
2021-07-22target/i386: Added consistency checks for CR4Lara Lazier
2021-07-22target/i386: Added V_INTR_PRIO check to virtual interruptsLara Lazier
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson
2021-07-21target/i386: Implement debug_check_breakpointRichard Henderson
2021-07-21tcg: Rename helper_atomic_*_mmu and provide for user-onlyRichard Henderson
2021-07-13target/i386: Correct implementation for FCS, FIP, FDS and FDPZiqiao Kong
2021-07-13target/i386: Split out do_fninitRichard Henderson
2021-07-13target/i386: Trivial code motion and code style fixZiqiao Kong
2021-07-13target/i386: Tidy hw_breakpoint_removeDmitry Voronetskiy
2021-07-12Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...Peter Maydell
2021-07-09target/i386: Use cpu_breakpoint_test in breakpoint_handlerRichard Henderson
2021-07-09target/i386: Use translator_use_goto_tbRichard Henderson
2021-07-09tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé
2021-07-09target/i386: fix exceptions for MOV to DRPaolo Bonzini
2021-07-09target/i386: Added DR6 and DR7 consistency checksLara Lazier
2021-07-09target/i386: Added MSRPM and IOPM size checkLara Lazier
2021-07-06target/i386: Move X86XSaveArea into TCGDavid Edmondson
2021-07-06target/i386: Populate x86_ext_save_areas offsets using cpuid where possibleDavid Edmondson
2021-06-29target/i386: Improve bswap translationRichard Henderson
2021-06-29tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64Richard Henderson
2021-06-16target/i386: Added Intercept CR0 writes checkLara Lazier
2021-06-16target/i386: Added consistency checks for CR0Lara Lazier
2021-06-16target/i386: Added consistency checks for VMRUN intercept and ASIDLara Lazier
2021-06-16target/i386: Refactored intercept checks into cpu_svm_has_interceptLara Lazier
2021-06-04target/i386: Fix decode of cr8Richard Henderson
2021-06-04target/i386: tcg: fix switching from 16-bit to 32-bit tasks or vice versaPaolo Bonzini
2021-06-04target/i386: tcg: fix loading of registers from 16-bit TSSPaolo Bonzini
2021-06-04target/i386: tcg: fix segment register offsets for 16-bit TSSPaolo Bonzini
2021-06-03softfloat: Introduce Floatx80RoundPrecRichard Henderson
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson
2021-05-20Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210520-v2' i...Peter Maydell
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