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path: root/target/hexagon
AgeCommit message (Expand)Author
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson
2021-05-05Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...Peter Maydell
2021-05-02hw: Do not include qemu/log.h if it is not necessaryThomas Huth
2021-05-01Hexagon (target/hexagon) CABAC decode binTaylor Simpson
2021-05-01Hexagon (target/hexagon) load into shifted register instructionsTaylor Simpson
2021-05-01Hexagon (target/hexagon) load and unpack bytes instructionsTaylor Simpson
2021-05-01Hexagon (target/hexagon) bit reverse (brev) addressingTaylor Simpson
2021-05-01Hexagon (target/hexagon) circular addressingTaylor Simpson
2021-05-01Hexagon (target/hexagon) add A4_addp_c/A4_subp_cTaylor Simpson
2021-05-01Hexagon (target/hexagon) add A6_vminub_RdPTaylor Simpson
2021-05-01Hexagon (target/hexagon) add A5_ACS (vacsh)Taylor Simpson
2021-05-01Hexagon (target/hexagon) add F2_sfinvsqrtaTaylor Simpson
2021-05-01Hexagon (target/hexagon) add F2_sfrecipa instructionTaylor Simpson
2021-05-01Hexagon (target/hexagon) compile all debug codeTaylor Simpson
2021-05-01Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.hTaylor Simpson
2021-05-01Hexagon (target/hexagon) cleanup reg_field_info definitionTaylor Simpson
2021-05-01Hexagon (target/hexagon) cleanup ternary operators in semanticsTaylor Simpson
2021-05-01Hexagon (target/hexagon) use softfloat for float-to-int conversionsTaylor Simpson
2021-05-01Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbnTaylor Simpson
2021-05-01Hexagon (target/hexagon) use softfloat default NaN and tininessTaylor Simpson
2021-05-01Hexagon (target/hexagon) change type of softfloat_roundingmodesTaylor Simpson
2021-05-01Hexagon (target/hexagon) remove unused carry_from_add64 functionTaylor Simpson
2021-05-01Hexagon (target/hexagon) change variables from int to bool when appropriateTaylor Simpson
2021-05-01Hexagon (target/hexagon) decide if pred has been written at TCG gen timeTaylor Simpson
2021-05-01Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURNTaylor Simpson
2021-05-01Hexagon (target/hexagon) use env_archcpu and env_cpuTaylor Simpson
2021-05-01Hexagon (target/hexagon) remove unnecessary inline directivesTaylor Simpson
2021-05-01Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pairTaylor Simpson
2021-05-01Hexagon (target/hexagon) TCG generation cleanupTaylor Simpson
2021-05-01target/hexagon: remove unnecessary semicolonsTaylor Simpson
2021-05-01target/hexagon: fix typo in commentTaylor Simpson
2021-05-01target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUMTaylor Simpson
2021-05-01target/hexagon: remove unnecessary checks in find_iclass_slotsTaylor Simpson
2021-05-01target/hexagon: translation changesTaylor Simpson
2021-04-01hexagon: do not specify Python scripts as inputsPaolo Bonzini
2021-04-01hexagon: do not specify executables as inputsPaolo Bonzini
2021-03-09target/hexagon/gen_tcg_funcs: Fix a typoPhilippe Mathieu-Daudé
2021-03-06target/hexagon/opcodes: Add missing varargs cleanupPhilippe Mathieu-Daudé
2021-03-06target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTRTaylor Simpson
2021-02-18Hexagon build infrastructureTaylor Simpson
2021-02-18Hexagon (target/hexagon) translationTaylor Simpson
2021-02-18Hexagon (target/hexagon) TCG for floating point instructionsTaylor Simpson
2021-02-18Hexagon (target/hexagon) TCG for instructions with multiple definitionsTaylor Simpson
2021-02-18Hexagon (target/hexagon) TCG generationTaylor Simpson
2021-02-18Hexagon (target/hexagon) instruction classesTaylor Simpson
2021-02-18Hexagon (target/hexagon) macrosTaylor Simpson
2021-02-18Hexagon (target/hexagon) opcode data structuresTaylor Simpson
2021-02-18Hexagon (target/hexagon) generater phase 4 - decode treeTaylor Simpson
2021-02-18Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode treeTaylor Simpson
2021-02-18Hexagon (target/hexagon) generator phase 2 - generate header filesTaylor Simpson