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path: root/target/arm/helper.c
AgeCommit message (Expand)Author
2017-07-11target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread modePeter Maydell
2017-06-02arm: Implement HFNMIENA support for M profile MPUPeter Maydell
2017-06-02arm: add MPU support to M profile CPUsMichael Davidsaver
2017-06-02armv7m: Classify faults as MemManage or BusFaultMichael Davidsaver
2017-06-02armv7m: Implement M profile default memory mapMichael Davidsaver
2017-06-02armv7m: Improve "-d mmu" tracing for PMSAv7 MPUMichael Davidsaver
2017-06-02arm: Remove unnecessary check on cpu->pmsav7_dregionPeter Maydell
2017-06-02arm: Don't let no-MPU PMSA cores write to SCTLR.MPeter Maydell
2017-06-02arm: Clean up handling of no-MPU PMSA CPUsPeter Maydell
2017-06-02arm: Use different ARMMMUIdx values for M profilePeter Maydell
2017-06-02arm: Add support for M profile CPUs having different MMU index semanticsPeter Maydell
2017-04-20arm: Move excnames[] array into arm_log_exceptions()Peter Maydell
2017-03-20arm: Fix APSR writes via M profile MSRPeter Maydell
2017-03-14target/arm: implement armv8 PMUSERENR (user-mode enable bits)Andrew Baumann
2017-03-09target/arm/helper: make it clear the EC field is also in hexAlex Bennée
2017-02-28armv7m: Raise correct kind of UsageFault for attempts to execute ARM codePeter Maydell
2017-02-28armv7m: Check exception return consistencyPeter Maydell
2017-02-28armv7m: Extract "exception taken" code into functionsPeter Maydell
2017-02-28armv7m: Simpler and faster exception startMichael Davidsaver
2017-02-28armv7m: Remove unused armv7m_nvic_acknowledge_irq() return valuePeter Maydell
2017-02-28armv7m: Escalate exceptions to HardFault if necessaryMichael Davidsaver
2017-02-24target-arm: ensure all cross vCPUs TLB flushes completeAlex Bennée
2017-02-24cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmapAlex Bennée
2017-02-24tcg: drop global lock during TCG code executionJan Kiszka
2017-02-10target-arm: Enable vPMU support under TCG modeWei Huang
2017-02-10target-arm: Add support for PMU register PMINTENSET_EL1Wei Huang
2017-02-10target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0Wei Huang
2017-02-10target-arm: Add support for PMU register PMSELR_EL0Wei Huang
2017-01-27armv7m: Report no-coprocessor faults correctlyPeter Maydell
2017-01-27armv7m: set CFSR.UNDEFINSTR on undefined instructionsMichael Davidsaver
2017-01-27armv7m: honour CCR.STACKALIGN on exception entryMichael Davidsaver
2017-01-27target/arm: Drop IS_M() macroPeter Maydell
2017-01-27armv7m: Clear FAULTMASK on return from non-NMI exceptionsMichael Davidsaver
2017-01-27armv7m: Fix reads of CONTROL register bit 1Michael Davidsaver
2017-01-27armv7m: Explicit error for bad vector tableMichael Davidsaver
2017-01-27armv7m: MRS/MSR: handle unprivileged accessMichael Davidsaver
2017-01-20target/arm: Implement DBGVCR32_EL2 system registerPeter Maydell
2017-01-20target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32()Peter Maydell
2017-01-16Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-...Peter Maydell
2017-01-13Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell
2017-01-13cputlb: drop flush_global flag from tlb_flushAlex Bennée
2017-01-12qmp: Report QOM type name on query-cpu-definitionsEduardo Habkost
2017-01-10target-arm: Use clz opcodeRichard Henderson
2016-12-27target-arm: Add VBAR support to ARM1176 CPUsCédric Le Goater
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
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