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AgeCommit message (Expand)Author
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber
2013-03-03gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell
2013-03-03cpu: Introduce ENV_OFFSET macrosAndreas Färber
2013-02-23target-xtensa: Use add2/sub2 for macRichard Henderson
2013-02-23target-xtensa: Use mul*2 for mul*hiRichard Henderson
2013-02-16cpu: Add CPUArchState pointer to CPUStateAndreas Färber
2013-02-16target-xtensa: Move TCG initialization to XtensaCPU initfnAndreas Färber
2013-02-16target-xtensa: Introduce QOM realizefn for XtensaCPUAndreas Färber
2013-02-01target-xtensa: Mark as unmigratableAndreas Färber
2012-12-22target-xtensa: fix search_pc for the last TB opcodeMax Filippov
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini
2012-12-19misc: move include files to include/qemu/Paolo Bonzini
2012-12-19qom: move include files to include/qom/Paolo Bonzini
2012-12-19exec: move include files to include/exec/Paolo Bonzini
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini
2012-12-16exec: refactor cpu_restore_stateBlue Swirl
2012-12-15target-xtensa: fix ITLB/DTLB page protection flagsMax Filippov
2012-12-08target-xtensa: use movcond where possibleMax Filippov
2012-12-08target-xtensa: implement MISC SRMax Filippov
2012-12-08target-xtensa: better control rsr/wsr/xsr access to SRsMax Filippov
2012-12-08target-xtensa: restrict available SRs by enabled optionsMax Filippov
2012-12-08target-xtensa: implement CACHEATTR SRMax Filippov
2012-12-08target-xtensa: implement ATOMCTL SRMax Filippov
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin
2012-11-10target-xtensa: avoid using cpu_single_envBlue Swirl
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber
2012-10-28target-xtensa: rename helper flagsAurelien Jarno
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
2012-10-06target-xtensa: de-optimize EXTUIAurelien Jarno
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
2012-09-22target-xtensa: implement coprocessor context optionMax Filippov
2012-09-22target-xtensa: implement FP1 groupMax Filippov
2012-09-22target-xtensa: implement FP0 conversionsMax Filippov
2012-09-22target-xtensa: implement FP0 arithmeticMax Filippov
2012-09-22target-xtensa: implement LSCX and LSCI groupsMax Filippov
2012-09-22target-xtensa: add FP registersMax Filippov
2012-09-22target-xtensa: handle boolean option in overlaysMax Filippov
2012-09-21target-xtensa: don't emit extra tcg_gen_goto_tbMax Filippov
2012-09-21target-xtensa: fix extui shift amountMax Filippov
2012-09-08target-xtensa: fix missing errno codes for mingw32Max Filippov
2012-09-05target-xtensa: convert host errno values to guestMax Filippov
2012-09-01target-xtensa: return ENOSYS for unimplemented simcallsMax Filippov
2012-08-09Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl
2012-08-09target-xtensa: make default CPU depend on target endiannessMax Filippov
2012-07-28target-xtensa: fix big-endian BBS/BBC implementationMax Filippov
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