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path: root/target-sh4/translate.c
AgeCommit message (Expand)Author
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson
2015-10-07target-sh4: Add flags state to insn_startRichard Henderson
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson
2015-09-13target-sh4: improve shad instructionAurelien Jarno
2015-09-13target-sh4: improve shld instructionAurelien Jarno
2015-09-13target-sh4: improve cmp/str instructionAurelien Jarno
2015-09-13target-sh4: use deposit in swap.b instructionAurelien Jarno
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite
2015-06-12target-sh4: remove dead codeAurelien Jarno
2015-06-12target-sh4: factorize fmov implementationAurelien Jarno
2015-06-12target-sh4: split out Q and M from of SR and optimize div1Aurelien Jarno
2015-06-12target-sh4: optimize negc using add2 and sub2Aurelien Jarno
2015-06-12target-sh4: optimize subc using sub2Aurelien Jarno
2015-06-12target-sh4: optimize addc using add2Aurelien Jarno
2015-06-12target-sh4: Split out T from SRAurelien Jarno
2015-06-12target-sh4: use bit number for SR constantsAurelien Jarno
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber
2013-12-21target-sh4: Use new qemu_ld/st opcodesAurelien Jarno
2013-10-10tcg: Move helper registration into tcg_context_initRichard Henderson
2013-09-02tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson
2013-07-23cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber
2013-07-09target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPUAndreas Färber
2013-06-28cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber
2013-03-12target-sh4: Introduce SuperHCPU subclassesAndreas Färber
2013-03-03gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell
2013-02-23target-sh4: Use mul*2 for dmul*Richard Henderson
2013-02-16target-sh4: Move TCG initialization to SuperHCPU initfnAndreas Färber
2013-02-16target-sh4: Introduce QOM realizefn for SuperHCPUAndreas Färber
2012-12-19exec: move include files to include/exec/Paolo Bonzini
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin
2012-11-10disas: avoid using cpu_single_envBlue Swirl
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
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