summaryrefslogtreecommitdiff
path: root/target-mips
AgeCommit message (Expand)Author
2013-03-04target-mips: fix DSP overflow macro and affected routinesPetar Jovanovic
2013-03-03gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell
2013-03-03cpu: Introduce ENV_OFFSET macrosAndreas Färber
2013-02-23target-mips: fix for sign-issue in MULQ_W helperPetar Jovanovic
2013-02-23target-mips: fix for incorrect multiplication with MULQ_S.PHPetar Jovanovic
2013-02-23target-mips: Use mul[us]2 in [D]MULT[U] insnsRichard Henderson
2013-02-16cpu: Add CPUArchState pointer to CPUStateAndreas Färber
2013-02-16target-mips: Move TCG initialization to MIPSCPU initfnAndreas Färber
2013-02-16target-mips: Introduce QOM realizefn for MIPSCPUAndreas Färber
2013-01-31target-mips: enable access to DSP ASE if implementedPetar Jovanovic
2013-01-31target-mips: Unfuse {,N}M{ADD,SUB}.fmtRichard Sandiford
2013-01-31target-mips: Sign-extend the result of LWRRichard Sandiford
2013-01-31target-mips: Fix signedness of loads in MIPS16 RESTOREsRichard Sandiford
2013-01-31target-mips: implement DSP (d)append sub-class with TCGAurelien Jarno
2013-01-31target-mips: use DSP unions for reduction add instructionsAurelien Jarno
2013-01-31target-mips: use DSP unions for unary DSP operatorsAurelien Jarno
2013-01-31target-mips: use DSP unions for binary DSP operatorsAurelien Jarno
2013-01-31target-mips: add unions to access DSP elementsAurelien Jarno
2013-01-31target-mips: generate a reserved instruction exception on CPU without DSPAurelien Jarno
2013-01-31target-mips: copy insn_flags in DisasContextAurelien Jarno
2013-01-31target-mips: fix DSP loads with rd = 0Aurelien Jarno
2013-01-15exec: Return CPUState from qemu_get_cpu()Andreas Färber
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber
2013-01-15target-mips: Clean up mips_cpu_map_tc() documentationAndreas Färber
2013-01-15cpu: Move nr_{cores,threads} fields to CPUStateAndreas Färber
2013-01-08target-mips: Fix helper and tests for dot/cross-dot product instructionsPetar Jovanovic
2013-01-08target-mips: Replace macros by inline functionsStefan Weil
2013-01-08target-mips: Allow DSP access to be disabled once enabled.Eric Johnson
2013-01-01target-mips: Use EXCP_SC rather than a magic number陳韋任 (Wei-Ren Chen)
2013-01-01target-mips: Make repl_ph to sign extend to target-longJovanovic, Petar
2013-01-01Fix my email addressDongxue Zhang
2013-01-01target-mips: Remove semicolon from macro definitionStefan Weil
2013-01-01target-mips: Fix for helpers for EXTR_* instructionsPetar Jovanovic
2013-01-01target-mips: Fix incorrect reads and writes to DSPControl registerPetar Jovanovic
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini
2012-12-19misc: move include files to include/qemu/Paolo Bonzini
2012-12-19qom: move include files to include/qom/Paolo Bonzini
2012-12-19exec: move include files to include/exec/Paolo Bonzini
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini
2012-12-16exec: refactor cpu_restore_stateBlue Swirl
2012-12-08Merge branch 'master' of git.qemu-project.org:/pub/git/qemuBlue Swirl
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin
2012-12-06target-mips: Fix incorrect shift for SHILO and SHILOVPetar Jovanovic
2012-12-06target-mips: Fix incorrect code and test for INSVPetar Jovanovic
2012-11-24target-mips: remove POOL48A from the microMIPS decodingAurelien Jarno
2012-11-24target-mips: Clean up microMIPS32 major opcode陳韋任 (Wei-Ren Chen)
2012-11-24target-mips: Add comments on POOL32Axf encoding陳韋任 (Wei-Ren Chen)
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 10:46:13 +0000