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QEMU is a generic and open source machine & userspace emulator and virtualizer.
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translate_init.c
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2016-03-30
target-mips: add MAAR, MAARI register
Yongbok Kim
2016-03-30
target-mips: enable CM GCR in MIPS64R6-generic CPU
Leon Alrae
2016-03-23
target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs
Leon Alrae
2016-02-26
target-mips: implement R6 multi-threading
Yongbok Kim
2015-10-30
target-mips: Set Config5.XNP for R6 cores
Yongbok Kim
2015-08-13
target-mips: update mips32r5-generic into P5600
Yongbok Kim
2015-07-15
target-mips: fix MIPS64R6-generic configuration
Yongbok Kim
2015-06-26
target-mips: add mips32r6-generic CPU definition
Yongbok Kim
2015-06-12
target-mips: enable XPA and LPA features
Leon Alrae
2015-06-12
target-mips: remove misleading comments in translate_init.c
Leon Alrae
2015-06-11
target-mips: add ERETNC instruction and Config5.LLB bit
Leon Alrae
2015-06-11
target-mips: Misaligned memory accesses for R6
Yongbok Kim
2015-06-11
target-mips: add Config5.FRE support allowing Status.FR=0 emulation
Leon Alrae
2015-03-11
target-mips: add missing MSACSR and restore fp_status and hflags
Leon Alrae
2015-02-13
target-mips: Make CP0.Status.CU1 read-only for the 5Kc and 5KEc processors
Maciej W. Rozycki
2014-12-16
target-mips: Fix formatting in `mips_defs'
Maciej W. Rozycki
2014-12-16
target-mips: Enable vectored interrupt support for the 74Kf CPU
Maciej W. Rozycki
2014-12-16
target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processors
Maciej W. Rozycki
2014-12-16
target-mips: Add 5KEc and 5KEf MIPS64r2 processors
Maciej W. Rozycki
2014-11-07
mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits
Maciej W. Rozycki
2014-11-03
target-mips: add MSA support to mips32r5-generic
Yongbok Kim
2014-11-03
target-mips: add msa_reset(), global msa register
Yongbok Kim
2014-11-03
target-mips: enable features in MIPS64R6-generic CPU
Leon Alrae
2014-11-03
target-mips: add TLBINV support
Leon Alrae
2014-11-03
target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}
Leon Alrae
2014-10-14
target-mips: define a new generic CPU supporting MIPS64 Release 6 ISA
Leon Alrae
2014-03-27
target-mips: Avoid shifting left into sign bit
Peter Maydell
2014-03-13
exec: Change cpu_abort() argument to CPUState
Andreas Färber
2014-02-10
target-mips: add user-mode FR switch support for MIPS32r5
Petar Jovanovic
2014-02-10
target-mips: add support for CP0_Config5
Petar Jovanovic
2014-02-10
target-mips: add support for CP0_Config4
Petar Jovanovic
2014-02-10
target-mips: add CPU definition for MIPS32R5
Petar Jovanovic
2013-08-03
target-mips: fix 34Kf configuration for DSP ASE
Yongbok Kim
2012-10-31
target-mips: Add ASE DSP processors
Jia Liu
2011-09-06
mips: Default to using one VPE and one TC.
Edgar E. Iglesias
2011-09-06
mips: Enable VInt interrupt mode for the 34Kf
Edgar E. Iglesias
2011-08-20
Use glib memory allocation and free functions
Anthony Liguori
2011-05-08
Fix typos in comments (interupt -> interrupt)
Stefan Weil
2011-05-06
Fix typo in code and comments
Stefan Weil
2010-10-30
target-xxx: Use fprintf_function (format checking)
Stefan Weil
2010-07-31
Remove unused constant
Hervé Poussineau
2010-06-29
MIPS: Initial support of fulong mini pc (CPU definition)
Huacai Chen
2009-12-17
target-mips: No MIPS16 support for 4Kc, 4KEc cores
Stefan Weil
2009-12-16
target-mips: 4Kc, 4KEc cores do not support MIPS16
Stefan Weil
2009-12-13
target-mips: fix user-mode emulation startup
Nathan Froyd
2009-12-13
target-mips: set Config1.CA for MIPS16-aware CPUs
Nathan Froyd
2009-11-22
target-mips: make CP0_LLAddr register CPU dependent
Aurelien Jarno
2009-11-14
mips: fix cpu_reset memory leak
Blue Swirl
2009-10-01
Revert "Get rid of _t suffix"
Anthony Liguori
2009-10-01
Get rid of _t suffix
malc
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