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2015-04-30kvm: add support for memory transaction attributesPaolo Bonzini
Let kvm_arch_post_run convert fields in the kvm_run struct to MemTxAttrs. These are then passed to address_space_rw. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-04-28Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into ↵Peter Maydell
staging X86 queue, 2015-04-27 (v2) # gpg: Signature made Mon Apr 27 19:42:39 2015 BST using RSA key ID 984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-pull-request: target-i386: Remove AMD feature flag aliases from CPU model table target-i386: X86CPU::xlevel2 QOM property target-i386: Make "level" and "xlevel" properties static qemu-config: Accept empty option values MAINTAINERS: Change status of X86 to Maintained MAINTAINERS: Add myself to X86 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-04-27target-i386: Remove AMD feature flag aliases from CPU model tableEduardo Habkost
When CPU vendor is AMD, the AMD feature alias bits on CPUID[0x80000001].EDX are already automatically copied from CPUID[1].EDX on x86_cpu_realizefn(). When CPU vendor is Intel, those bits are reserved and should be zero. On either case, those bits shouldn't be set in the CPU model table. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-04-27target-i386: X86CPU::xlevel2 QOM propertyEduardo Habkost
We already have "level" and "xlevel", only "xlevel2" is missing. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-04-27target-i386: Make "level" and "xlevel" properties staticEduardo Habkost
Static properties require only 1 line of code, much simpler than the existing code that requires writing new getters/setters. As a nice side-effect, this fixes an existing bug where the setters were incorrectly allowing the properties to be changed after the CPU was already realized. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-04-26Switch non-CPU callers from ld/st*_phys to address_space_ld/st*Peter Maydell
Switch all the uses of ld/st*_phys to address_space_ld/st*, except for those cases where the address space is the CPU's (ie cs->as). This was done with the following script which generates a Coccinelle patch. A few over-80-columns lines in the result were rewrapped by hand where Coccinelle failed to do the wrapping automatically, as well as one location where it didn't put a line-continuation '\' when wrapping lines on a change made to a match inside a macro definition. ===begin=== #!/bin/sh -e # Usage: # ./ldst-phys.spatch.sh > ldst-phys.spatch # spatch -sp_file ldst-phys.spatch -dir . | sed -e '/^+/s/\t/ /g' > out.patch # patch -p1 < out.patch for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do cat <<EOF @ cpu_matches_ld_${FN} @ expression E1,E2; identifier as; @@ ld${FN}_phys(E1->as,E2) @ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @ expression E1,E2; @@ -ld${FN}_phys(E1,E2) +address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL) EOF done for FN in b w_le w_be l_le l_be q_le q_be w l q; do cat <<EOF @ cpu_matches_st_${FN} @ expression E1,E2,E3; identifier as; @@ st${FN}_phys(E1->as,E2,E3) @ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @ expression E1,E2,E3; @@ -st${FN}_phys(E1,E2,E3) +address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL) EOF done ===endit=== Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2015-04-04target-i386: remove superfluous TARGET_HAS_SMC macroEmilio G. Cota
Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-04-02target-i386: clear bsp bit when designating bspNadav Amit
Since the BSP bit is writable on real hardware, during reset all the CPUs which were not chosen to be the BSP should have their BSP bit cleared. This fix is required for KVM to work correctly when it changes the BSP bit. An additional fix is required for QEMU tcg to allow software to change the BSP bit. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Message-Id: <1427932716-11800-1-git-send-email-namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-04-02target-i386: save 64-bit CR3 in 64-bit SMM state save areaPaolo Bonzini
The x86_64 CR3 register is 64 bits wide, save all of them! Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-03-19target-i386: Haswell-noTSX and Broadwell-noTSXEduardo Habkost
With the Intel microcode update that removed HLE and RTM, there will be different kinds of Haswell and Broadwell CPUs out there: some that still have the HLE and RTM features, and some that don't have the HLE and RTM features. On both cases people may be willing to use the pc-*-2.3 machine-types. So, to cover both cases, introduce Haswell-noTSX and Broadwell-noTSX CPU models, for hosts that have Haswell and Broadwell CPUs without TSX support. Reviewed-by: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-19Revert "target-i386: Disable HLE and RTM on Haswell & Broadwell"Eduardo Habkost
This reverts commit 13704e4c455770d500d6b87b117e32f0d01252c9. With the Intel microcode update that removed HLE and RTM, there will be different kinds of Haswell and Broadwell CPUs out there: some that still have the HLE and RTM features, and some that don't have the HLE and RTM features. On both cases people may be willing to use the pc-*-2.3 machine-types. So instead of making the CPU model results confusing by making it depend on the machine-type, keep HLE and RTM on the existing Haswell and Broadwell CPU models. The plan is to introduce "Haswell-noTSX" and "Broadwell-noTSX" CPU models later, for people who have CPUs that don't have TSX feature available. Reviewed-by: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-17target-i386: Remove icc_bridge parameter from cpu_x86_create()Eduardo Habkost
Instead of passing icc_bridge from the PC initialization code to cpu_x86_create(), make the PC initialization code attach the CPU to icc_bridge. The only difference here is that icc_bridge attachment will now be done after x86_cpu_parse_featurestr() is called. But this shouldn't make any difference, as property setters shouldn't depend on icc_bridge. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson
This is improved type checking for the translators -- it's no longer possible to accidentally swap arguments to the branch functions. Note that the code generating backends still manipulate labels as int. With notable exceptions, the scope of the change is just a few lines for each target, so it's not worth building extra machinery to do this change in per-target increments. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-03-12Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
misc fixes and cleanups A bunch of fixes all over the place, some of the bugs fixed are actually regressions. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed Mar 11 17:48:30 2015 GMT using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (25 commits) virtio-scsi: remove empty wrapper for cmd virtio-scsi: clean out duplicate cdb field virtio-scsi: fix cdb/sense size uapi/virtio_scsi: allow overriding CDB/SENSE size virtio-scsi: drop duplicate CDB/SENSE SIZE exec: don't include hw/boards for linux-user acpi: specify format for build_append_namestring MAINTAINERS: drop aliguori@amazon.com tpm: Move memory subregion function into realize function virtio-pci: Convert to realize() pci: Convert pci_nic_init() to Error to avoid qdev_init() machine: query mem-merge machine property machine: query dump-guest-core machine property hw/boards: make it safe to include for linux-user machine: query phandle-start machine property machine: query kvm-shadow-mem machine property kvm: add machine state to kvm_arch_init machine: query kernel-irqchip property machine: allowed/required kernel-irqchip support machine: replace qemu opts with iommu property ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11machine: query kvm-shadow-mem machine propertyMarcel Apfelbaum
Commit e79d5a6 ("machine: remove qemu_machine_opts global list") removed the global option descriptions and moved them to MachineState's QOM properties. Query kvm-shadow-mem by accessing machine properties through designated wrappers. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2015-03-11kvm: add machine state to kvm_arch_initMarcel Apfelbaum
Needed to query machine's properties. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2015-03-11Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into ↵Peter Maydell
staging QOM CPUState and X86CPU * Add CPUClass documentation * Clean up X86CPU APIC realization * Cleanups around cpu_init() # gpg: Signature made Tue Mar 10 17:27:28 2015 GMT using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/qom-cpu-for-peter: cpu: Make cpu_init() return QOM CPUState object unicore32: Use uc32_cpu_init() m68k: Use cpu_m68k_init() target-unicore32: Make uc32_cpu_init() return UniCore32CPU target-i386: Clean up misuse of qdev_init() in realize method cpu: Add missing documentation for some CPUClass methods Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into ↵Peter Maydell
staging X86 patches queued in the last few weeks. Mostly code cleanup and changes on code assigning APIC ID. # gpg: Signature made Mon Mar 9 20:40:38 2015 GMT using RSA key ID 984DC5A6 # gpg: Can't check signature: public key not found * remotes/ehabkost/tags/x86-pull-request: target-i386: Require APIC ID to be explicitly set before CPU realize target-i386: Move APIC ID compatibility code to pc.c target-i386: Move CPUX86State::cpuid_apic_id to X86CPU::apic_id target-i386: Remove unused APIC ID default code target-i386: Eliminate unnecessary get_cpuid_vendor() function target-i386: Simplify listflags() function target-i386: Move topology.h to include/hw/i386 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost
Instead of making cpu_init() return CPUArchState, return CPUState. Changes were made using the Coccinelle semantic patch below. @@ typedef CPUState; identifier e; expression args; type CPUArchState; @@ - e = + cpu = cpu_init(args); - if (!e) { + if (!cpu) { ... } - cpu = ENV_GET_CPU(env); + e = cpu->env_ptr; @@ identifier new_env, new_cpu, env, cpu; type CPUArchState; expression args; @@ -{ - CPUState *cpu = ENV_GET_CPU(env); - CPUArchState *new_env = cpu_init(args); - CPUState *new_cpu = ENV_GET_CPU(new_env); +{ + CPUState *cpu = ENV_GET_CPU(env); + CPUState *new_cpu = cpu_init(args); + CPUArchState *new_env = new_cpu->env_ptr; ... } @@ identifier c, cpu_init_func, cpu_model; type StateType, CPUType; @@ -static inline StateType* cpu_init(const char *cpu_model) -{ - CPUType *c = cpu_init_func(cpu_model); ( - if (c == NULL) { - return NULL; - } - return &c->env; | - if (c) { - return &c->env; - } - return NULL; ) -} +#define cpu_init(cpu_model) CPU(cpu_init_func(cpu_model)) @@ identifier cpu_init_func; identifier model; @@ -#define cpu_init(model) (&cpu_init_func(model)->env) +#define cpu_init(model) CPU(cpu_init_func(model)) Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Richard Henderson <rth@twiddle.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Max Filippov <jcmvbkbc@gmail.com> [AF: Fixed up cpu_copy() manually] Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-03-10target-i386: Clean up misuse of qdev_init() in realize methodMarkus Armbruster
x86_cpu_apic_realize() calls qdev_init() to realize the APIC. qdev_init()'s error handling has unwanted side effects: it unparents the device, and it calls qerror_report_err(). qerror_report_err() is always inappropriate in realize methods, because it doesn't return the Error object. It either reports the error to stderr or the human monitor, or it stores it in the QMP monitor, where it makes the QMP command fail even though the realize method succeeded. Fortunately, qdev_init() can't actually fail here, because realize can't fail for any of the three possible APIC device models. Clean up by cutting out the qdev_init() middle-man: set property "realized" directly. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-03-10x86: fix SS selector in SYSRETBill Paul
According to my reading of the Intel documentation, the SYSRET instruction is supposed to force the RPL bits of the %ss register to 3 when returning to user mode. The actual sequence is: SS.Selector <-- (IA32_STAR[63:48]+8) OR 3; (* RPL forced to 3 *) However, the code in helper_sysret() leaves them at 0 (in other words, the "OR 3" part of the above sequence is missing). It does set the privilege level bits of %cs correctly though. This has caused me trouble with some of my VxWorks development: code that runs okay on real hardware will crash on QEMU, unless I apply the patch below. Signed-off-by: Bill Paul <wpaul@windriver.com> Message-Id: <201503091548.01462.wpaul@windriver.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-03-09target-i386: Require APIC ID to be explicitly set before CPU realizeEduardo Habkost
On softmuu, instead of setting APIC ID automatically when creating a X86CPU, require the property to be set before realizing the object (which is already done by the CPU creation code on PC). Keep apic_id = 0 by default on *-user so it can simply create a new CPU object and realize it without extra steps (so target-i386 will be able to use cpu_generic_init() eventually). Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-09target-i386: Move APIC ID compatibility code to pc.cEduardo Habkost
The APIC ID compatibility code is required only for PC, and now that x86_cpu_initfn() doesn't use x86_cpu_apic_id_from_index() anymore, that code can be moved to pc.c. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-09target-i386: Move CPUX86State::cpuid_apic_id to X86CPU::apic_idEduardo Habkost
The field doesn't need to be inside CPUX86State, and it is not specific for the CPUID instruction, so move and rename it. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-09target-i386: Remove unused APIC ID default codeEduardo Habkost
The existing apic_id = cpu_index code has no visible effect: the PC code already initializes the APIC ID according to the topology on pc_new_cpu(), and linux-user memcpy()s the CPU state (including cpuid_apic_id) on cpu_copy(). Remove the dead code and simply let APIC ID to to be 0 by default. This doesn't change behavior of PC because apic-id is already explicitly set, and doesn't affect linux-user because APIC ID was already always 0. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-09target-i386: Eliminate unnecessary get_cpuid_vendor() functionEduardo Habkost
The function was used in only two places. In one of them, the function made the code less readable by requiring temporary te[bcd]x variables. In the other one we can simply inline the existing code. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-09target-i386: Simplify listflags() functionEduardo Habkost
listflags() had lots of unnecessary complexity. Instead of printing to a buffer that will be immediately printed, simply call the printing function directly. Also, remove the fbits and flags arguments that were always set to the same value. Also, there's no need to list the flags in reverse order. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-09target-i386: Move topology.h to include/hw/i386Eduardo Habkost
This will allow the PC code to use the header, and lets us eliminate the QEMU_INCLUDES hack inside tests/Makefile. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-03-03Revert "Merge remote-tracking branch ↵Peter Maydell
'remotes/ehabkost/tags/x86-pull-request' into staging" This reverts commit b8a173b25c887a606681fc35a46702c164d5b2d0, reversing changes made to 5de090464f1ec5360c4f30faa01d8a9f8826cd58. (I applied this pull request when I should not have done so, and am now immediately reverting it.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-02Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into ↵Peter Maydell
staging * remotes/ehabkost/tags/x86-pull-request: target-i386: Move APIC ID compatibility code to pc.c target-i386: Require APIC ID to be explicitly set before CPU realize target-i386: Set APIC ID using cpu_index on CONFIG_USER linux-user: Check for cpu_init() errors target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_id target-i386: Simplify error handling on cpu_x86_init_user() target-i386: Eliminate cpu_init() function target-i386: Rename cpu_x86_init() to cpu_x86_init_user() target-i386: Move topology.h to include/hw/i386 target-i386: Eliminate unnecessary get_cpuid_vendor() function target-i386: Simplify listflags() function Conflicts: target-i386/cpu.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-02-25target-i386: Move APIC ID compatibility code to pc.cEduardo Habkost
The APIC ID compatibility code is required only for PC, and now that x86_cpu_initfn() doesn't use x86_cpu_apic_id_from_index() anymore, that code can be moved to pc.c. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Require APIC ID to be explicitly set before CPU realizeEduardo Habkost
Instead of setting APIC ID automatically when creating a X86CPU, require the property to be set before realizing the object (which all callers of cpu_x86_create() already do). Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Set APIC ID using cpu_index on CONFIG_USEREduardo Habkost
The PC CPU initialization code already sets apic-id based on the CPU topology, and CONFIG_USER doesn't need the topology-based APIC ID calculation code. Make CONFIG_USER set apic-id before realizing the CPU (just like PC already does), so we can simplify x86_cpu_initfn later. As there is no CPU topology configuration in CONFIG_USER, just use cpu_index as the APIC ID. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_idEduardo Habkost
The field doesn't need to be inside CPUState, and it is not specific for the CPUID instruction, so move and rename it. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Simplify error handling on cpu_x86_init_user()Eduardo Habkost
Isolate error handling path from the "if (error)" checks. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Eliminate cpu_init() functionEduardo Habkost
Instead of putting extra logic inside cpu.h, just do everything inside cpu_x86_init_user(). Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Rename cpu_x86_init() to cpu_x86_init_user()Eduardo Habkost
The function is used only for CONFIG_USER, so make its purpose clear. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Move topology.h to include/hw/i386Eduardo Habkost
This will allow the PC code to use the header, and lets us eliminate the QEMU_INCLUDES hack inside tests/Makefile. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Eliminate unnecessary get_cpuid_vendor() functionEduardo Habkost
The function was used in only two places. In one of them, the function made the code less readable by requiring temporary te[bcd]x variables. In the other one we can simply inline the existing code. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-25target-i386: Simplify listflags() functionEduardo Habkost
listflags() had lots of unnecessary complexity. Instead of printing to a buffer that will be immediately printed, simply call the printing function directly. Also, remove the fbits and flags arguments that were always set to the same value. Also, there's no need to list the flags in reverse order. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-02-18error: Use error_report_err() where appropriateMarkus Armbruster
Coccinelle semantic patch: @@ expression E; @@ - error_report("%s", error_get_pretty(E)); - error_free(E); + error_report_err(E); @@ expression E, S; @@ - error_report("%s", error_get_pretty(E)); + error_report_err(E); ( exit(S); | abort(); ) Trivial manual touch-ups in block/sheepdog.c. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson
The method by which we count the number of ops emitted is going to change. Abstract that away into some inlines. Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-01-26target-i386: Disable HLE and RTM on Haswell & BroadwellEduardo Habkost
All Haswell CPUs and some Broadwell CPUs were updated by Intel to have the HLE and RTM features disabled. This will prevent "-cpu Haswell,enforce" and "-cpu Broadwell,enforce" from running out of the box on those CPUs. Disable those features by default on Broadwell and Haswell CPU models, starting on pc-*-2.3. Users who want to use those features can enable them explicitly on the command-line. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-26target-i386: make xmm_regs 512-bit widePaolo Bonzini
Right now, the AVX512 registers are split in many different fields: xmm_regs for the low 128 bits of the first 16 registers, ymmh_regs for the next 128 bits of the same first 16 registers, zmmh_regs for the next 256 bits of the same first 16 registers, and finally hi16_zmm_regs for the full 512 bits of the second 16 bit registers. This makes it simple to move data in and out of the xsave region, but would be a nightmare for a hypothetical TCG implementation and leads to a proliferation of [XYZ]MM_[BWLSQD] macros. Instead, this patch marshals data manually from the xsave region to a single 32x512-bit array, simplifying the macro jungle and clarifying which bits are in which vmstate subsection. The migration format is unaffected. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-26target-i386: use vmstate_offset_sub_array for AVX registersPaolo Bonzini
After the next patch, each vmstate field will extract parts of a larger (32x512-bit) array, so we cannot check the vmstate field against the type of the array. While changing this, change the macros to accept the index of the first element (which will not be 0 for Hi16_ZMM_REGS) instead of the number of elements (which is always CPU_NB_REGS). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-20cpu_ldst.h: Use inline functions for usermode cpu_ld/st accessorsPeter Maydell
Use inline functions rather than macros for cpu_ld/st accessors for the *-user configurations, as we already do for softmmu. This has a two advantages: * we can actually typecheck our arguments * we don't need to leak the _raw macros everywhere Since the _kernel functions were only used by target-i386/seg_helper.c, put the definitions for them in that file too. (It already has the similar template include code to define them for the softmmu case, so it makes sense to have it deal with defining them for user-only.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-12-git-send-email-peter.maydell@linaro.org
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell
The TARGET_HAS_ICE #define is intended to indicate whether a target-* guest CPU implementation supports the breakpoint handling. However, all our guest CPUs have that support (the only two which do not define TARGET_HAS_ICE are unicore32 and openrisc, and in both those cases the bp support is present and the lack of the #define is just a bug). So remove the #define entirely: all new guest CPU support should include breakpoint handling as part of the basic implementation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
2015-01-14Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
Mostly bugfixes and cleanups from qemu-devel. Yet another small patch from the record/replay series, and a few SCSI and i386 patches as well. # gpg: Signature made Wed 14 Jan 2015 09:39:14 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: cpus: consistently use QEMU_CLOCK_VIRTUAL_RT for icount_warp_rt timer qemu-timer: rename timer_init to timer_init_tl scsi: fix cancellation when I/O was completed but DMA was not. rules.mak: Fix module build hw/scsi/lsi53c895a: add support for additional diag / debug registers qemu-common.h: optimise muldiv64 if int128 is available target-i386: do not memcpy in and out of xmm_regs target-i386: fix movntsd on big-endian hosts vl.c: fix regression when reading memory size from config file vl: Don't silently change topology when all -smp options were set vl: fix max_cpus check vl: Avoid unnecessary 'if' nesting 9pfs: changed to use event_notifier instead of qemu_pipe vl.c: fix regression when reading machine type from config file char: restore stdio echo on resume from suspend. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-14target-i386: do not memcpy in and out of xmm_regsPaolo Bonzini
After the next patch, we will move the high parts of AVX and AVX512 registers in the same array as the SSE registers. This will make it impossible to memcpy an array of 128-bit values in and out of xmm_regs in one swoop. Use a for loop instead. Similarly, always use XMM_Q in translate.c. This avoids introducing bugs such as the one fixed in the previous patch. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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