Age | Commit message (Expand) | Author |
2014-01-31 | target-arm: A64: Add SIMD shift by immediate | Alex Bennée |
2014-01-31 | target-arm: A64: Add simple SIMD 3-same floating point ops | Peter Maydell |
2014-01-31 | target-arm: A64: Add integer ops from SIMD 3-same group | Peter Maydell |
2014-01-31 | target-arm: A64: Add logic ops from SIMD 3 same group | Peter Maydell |
2014-01-31 | target-arm: A64: Add top level decode for SIMD 3-same group | Peter Maydell |
2014-01-31 | target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops | Peter Maydell |
2014-01-31 | target-arm: A64: Add SIMD three-different ABDL instructions | Peter Maydell |
2014-01-31 | target-arm: A64: Add SIMD three-different multiply accumulate insns | Peter Maydell |
2014-01-31 | target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM | Will Newton |
2014-01-31 | target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTM | Will Newton |
2014-01-31 | target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ | Will Newton |
2014-01-31 | target-arm: Add set_neon_rmode helper | Will Newton |
2014-01-31 | target-arm: Add support for AArch32 SIMD VRINTX | Will Newton |
2014-01-31 | target-arm: Add support for AArch32 FP VRINTX | Will Newton |
2014-01-31 | target-arm: Add support for AArch32 FP VRINTZ | Will Newton |
2014-01-31 | target-arm: Add support for AArch32 FP VRINTR | Will Newton |
2014-01-31 | target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM | Will Newton |
2014-01-31 | target-arm: Move arm_rmode_to_sf to a shared location. | Will Newton |
2014-01-31 | ARM: Convert MIDR to a property | Alistair Francis |
2014-01-31 | target-arm: A64: Add SIMD scalar copy instructions | Peter Maydell |
2014-01-31 | target-arm: A64: Add SIMD modified immediate group | Alex Bennée |
2014-01-31 | target-arm: A64: Add SIMD copy operations | Alex Bennée |
2014-01-31 | target-arm: A64: Add SIMD across-lanes instructions | Michael Matz |
2014-01-31 | target-arm: A64: Add SIMD ZIP/UZP/TRN | Michael Matz |
2014-01-31 | target-arm: A64: Add SIMD TBL/TBLX | Michael Matz |
2014-01-31 | target-arm: A64: Add SIMD EXT | Peter Maydell |
2014-01-31 | target-arm: A64: Add decode skeleton for SIMD data processing insns | Alex Bennée |
2014-01-31 | target-arm: A64: Add SIMD ld/st single | Peter Maydell |
2014-01-31 | target-arm: A64: Add SIMD ld/st multiple | Alex Bennée |
2014-01-14 | Merge remote branch 'luiz/queue/qmp' into qmpq | Edgar E. Iglesias |
2014-01-14 | target-arm: Switch ARMCPUInfo arrays to use terminator entries | Peter Maydell |
2014-01-12 | arm: fix compile on bigendian host | Alexey Kardashevskiy |
2014-01-08 | target-arm: A64: Add support for FCVT between half, single and double | Peter Maydell |
2014-01-08 | target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions | Peter Maydell |
2014-01-08 | target-arm: A64: Add floating-point<->integer conversion instructions | Will Newton |
2014-01-08 | target-arm: A64: Add floating-point<->fixed-point instructions | Alexander Graf |
2014-01-08 | target-arm: A64: Add extra VFP fixed point conversion helpers | Will Newton |
2014-01-08 | target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion | Peter Maydell |
2014-01-08 | target-arm: Rename A32 VFP conversion helpers | Will Newton |
2014-01-08 | target-arm: Prepare VFP_CONV_FIX helpers for A64 uses | Will Newton |
2014-01-08 | target-arm: fix build with gcc 4.8.2 | Michael S. Tsirkin |
2014-01-08 | target-arm: remove raw_read|write duplication | Peter Crosthwaite |
2014-01-08 | target-arm: use c13_context field for CONTEXTIDR | Sergey Fedorov |
2014-01-08 | target-arm: Give the FPSCR rounding modes names | Alexander Graf |
2014-01-08 | target-arm: A64: Add support for floating point cond select | Claudio Fontana |
2014-01-08 | target-arm: A64: Add support for floating point conditional compare | Claudio Fontana |
2014-01-08 | target-arm: A64: Add support for floating point compare | Claudio Fontana |
2014-01-08 | target-arm: A64: Add fmov (scalar, immediate) instruction | Alexander Graf |
2014-01-08 | target-arm: A64: Add "Floating-point data-processing (3 source)" insns | Alexander Graf |
2014-01-08 | target-arm: A64: Add "Floating-point data-processing (2 source)" insns | Alexander Graf |