summaryrefslogtreecommitdiff
path: root/target-arm
AgeCommit message (Expand)Author
2015-09-07target-arm: Improve semihosting debug printsChristopher Covington
2015-09-07target-arm/arm-semi.c: Fix broken SYS_WRITE0 via gdbPeter Maydell
2015-08-25target-arm: Implement AArch64 TLBI operations on IPAsPeter Maydell
2015-08-25target-arm: Implement missing EL3 TLB invalidate operationsPeter Maydell
2015-08-25target-arm: Implement missing EL2 TLBI operationsPeter Maydell
2015-08-25target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touchPeter Maydell
2015-08-25target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric orderPeter Maydell
2015-08-25target-arm: Implement AArch32 ATS1H* operationsPeter Maydell
2015-08-25target-arm: Enable the AArch32 ATS12NSO opsPeter Maydell
2015-08-25target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3Peter Maydell
2015-08-25target-arm: Wire up AArch64 EL2 and EL3 address translation opsPeter Maydell
2015-08-25target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translationsPeter Maydell
2015-08-25target-arm: Implement missing ACTLR registersPeter Maydell
2015-08-25target-arm: Implement missing AFSR registersPeter Maydell
2015-08-25target-arm: Implement missing AMAIR registersPeter Maydell
2015-08-25target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registersPeter Maydell
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson
2015-08-13target-arm: Add AArch32 banked register access to secure physical timerPeter Maydell
2015-08-13target-arm: Add the AArch64 view of the Secure physical timerPeter Maydell
2015-08-13target-arm: Add debug check for mismatched cpreg resetsPeter Maydell
2015-08-13Introduce gic_class_name() instead of repeating conditionPavel Fedin
2015-08-13target-arm: Add the Hypervisor timerEdgar E. Iglesias
2015-08-13target-arm: Pass timeridx as argument to various timer functionsEdgar E. Iglesias
2015-08-13target-arm: Rename and move gt_cnt_resetEdgar E. Iglesias
2015-08-13target-arm: Add CNTHCTL_EL2Edgar E. Iglesias
2015-08-13target-arm: Add CNTVOFF_EL2Edgar E. Iglesias
2015-07-21target-arm: kvm: Differentiate registers based on write-back levelsChristoffer Dall
2015-07-15target-arm: Fix broken SCTLR_EL3 resetPeter Maydell
2015-07-09disas: arm: QOMify target specific disas setupPeter Crosthwaite
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite
2015-07-09cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite
2015-07-09cpu: Add Error argument to cpu_exec_init()Bharata B Rao
2015-07-07crypto: move built-in AES implementation into crypto/Daniel P. Berrange
2015-07-06target-arm: Implement YIELD insn to yield in ARM and Thumb translatorsPeter Maydell
2015-07-06target-arm: Split DISAS_YIELD from DISAS_WFEPeter Maydell
2015-07-06target-arm: fix write helper for TLBI ALLE1ISSergey Fedorov
2015-06-26target-arm: A64: Print ELR when taking exceptionsSoren Brinkmann
2015-06-26target-arm: default empty semihosting cmdlineLiviu Ionescu
2015-06-22Include qapi/qmp/qerror.h exactly where neededMarkus Armbruster
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite
2015-06-19semihosting: add --semihosting-config arg sub-argumentLeon Alrae
2015-06-19semihosting: create SemihostingConfig structure and semihost.hLeon Alrae
2015-06-19target-arm: Add support for Cortex-R5Peter Crosthwaite
2015-06-19target-arm: Implement PMSAv7 MPUPeter Crosthwaite
2015-06-19target-arm: Add registers for PMSAv7Peter Crosthwaite
2015-06-19target-arm/helper.c: define MPUIR registerPeter Crosthwaite
2015-06-19target-arm: Do not reset sysregs marked as ALIASSergey Fedorov
2015-06-19target-arm: Add the Cortex-M4 CPUAurelio C. Remonda
2015-06-15target-arm: Correct "preferred return address" for cpreg access exceptionsPeter Maydell
2015-06-15arm: helper: rename get_phys_addr_mpuPeter Crosthwaite
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 12:49:34 +0000