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QEMU is a generic and open source machine & userspace emulator and virtualizer.
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2014-04-17
target-arm: Remove THUMB2EE feature from AArch64 'any' CPU
Peter Maydell
2014-04-17
target-arm: Implement ISR_EL1 register
Peter Maydell
2014-04-17
target-arm: Implement AArch64 view of ACTLR
Peter Maydell
2014-04-17
target-arm: Implement AArch64 view of CONTEXTIDR
Peter Maydell
2014-04-17
target-arm: Implement AArch64 views of AArch32 ID registers
Peter Maydell
2014-04-17
target-arm: Add Cortex-A57 processor
Peter Maydell
2014-04-17
target-arm: Implement ARMv8 MVFR registers
Peter Maydell
2014-04-17
target-arm: Implement AArch64 EL1 exception handling
Rob Herring
2014-04-17
target-arm: Move arm_log_exception() into internals.h
Peter Maydell
2014-04-17
target-arm: Implement AArch64 SPSR_EL1
Peter Maydell
2014-04-17
target-arm: Implement SP_EL0, SP_EL1
Peter Maydell
2014-04-17
target-arm: Add AArch64 ELR_EL1 register.
Peter Maydell
2014-04-17
target-arm: Implement AArch64 views of fault status and data registers
Rob Herring
2014-04-17
target-arm: Use dedicated CPU state fields for ARM946 access bit registers
Peter Maydell
2014-04-17
target-arm: A64: Implement DC ZVA
Peter Maydell
2014-04-17
target-arm: Don't mention PMU in debug feature register
Peter Maydell
2014-04-17
target-arm: Add v8 mmu translation support
Rob Herring
2014-04-17
target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1
Peter Maydell
2014-04-17
target-arm: A64: Add assertion that FP access was checked
Peter Maydell
2014-04-17
target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set
Peter Maydell
2014-04-17
target-arm: Provide syndrome information for MMU faults
Rob Herring
2014-04-17
target-arm: Add support for generating exceptions with syndrome information
Peter Maydell
2014-04-17
target-arm: Provide correct syndrome information for cpreg access traps
Peter Maydell
2014-04-17
target-arm: Define exception record for AArch64 exceptions
Peter Maydell
2014-04-17
target-arm: Implement AArch64 DAIF system register
Peter Maydell
2014-04-17
target-arm: Split out private-to-target functions into internals.h
Peter Maydell
2014-03-27
target-arm: Add missing 'static' attribute
Stefan Weil
2014-03-24
target-arm: Fix A64 Neon MLS
Peter Maydell
2014-03-18
target-arm: A64: Add saturating accumulate ops (USQADD/SUQADD)
Alex Bennée
2014-03-18
target-arm: A64: Add saturating int ops (SQNEG/SQABS)
Alex Bennée
2014-03-17
target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)
Alex Bennée
2014-03-17
target-arm: A64: Implement FCVTXN
Peter Maydell
2014-03-17
target-arm: A64: Implement scalar saturating narrow ops
Alex Bennée
2014-03-17
target-arm: A64: Move handle_2misc_narrow function
Alex Bennée
2014-03-17
target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE
Alex Bennée
2014-03-17
target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories
Peter Maydell
2014-03-17
target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL
Peter Maydell
2014-03-17
target-arm: A64: Implement FRINT*
Peter Maydell
2014-03-17
target-arm: A64: Implement SRI
Peter Maydell
2014-03-17
target-arm: A64: Add FRECPX (reciprocal exponent)
Alex Bennée
2014-03-17
target-arm: A64: List unsupported shift-imm opcodes
Peter Maydell
2014-03-17
target-arm: A64: Implement FCVTL
Peter Maydell
2014-03-17
target-arm: A64: Implement FCVTN
Peter Maydell
2014-03-17
target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions
Peter Maydell
2014-03-17
target-arm: A64: Implement SHLL, SHLL2
Peter Maydell
2014-03-17
target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP
Peter Maydell
2014-03-17
target-arm: A64: Saturating and narrowing shift ops
Alex Bennée
2014-03-17
target-arm: A64: Add remaining CLS/Z vector ops
Alex Bennée
2014-03-17
target-arm: A64: Add FSQRT to C3.6.17 (two misc)
Alex Bennée
2014-03-17
target-arm: A64: Add last AdvSIMD Integer to FP ops
Alex Bennée
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