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AgeCommit message (Expand)Author
2016-06-07virtio: move bi-endian target support to a single locationGreg Kurz
2016-06-06target-arm: Fix TTBR selecting logic on AArch32 Stage 2 translationSergey Sorokin
2016-06-06target-arm: Don't try to set ESR IL bit in arm_cpu_do_interrupt_aarch64()Peter Maydell
2016-06-06target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstepPeter Maydell
2016-06-06target-arm: A64: Create Instruction Syndromes for Data AbortsEdgar E. Iglesias
2016-06-06target-arm: Add the HSTR_EL2 registerAlistair Francis
2016-05-19cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini
2016-05-19hw: explicitly include qemu/log.hPaolo Bonzini
2016-05-19arm: move arm_log_exception into .c filePaolo Bonzini
2016-05-19qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini
2016-05-19hw: move CPU state serialization to migration/cpu.hPaolo Bonzini
2016-05-19target-arm: make cpu-qom.h not target specificPaolo Bonzini
2016-05-19cpu: make cpu-qom.h only include-able from cpu.hPaolo Bonzini
2016-05-12tcg: Allow goto_tb to any target PC in user modeSergey Fedorov
2016-05-12tcg: Clean up direct block chaining safety checksSergey Fedorov
2016-05-12tb: consistently use uint32_t for tb->flagsEmilio G. Cota
2016-05-12target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writesPeter Maydell
2016-05-12ARM: Factor out ARM on/off PSCI control functionsJean-Christophe DUBOIS
2016-05-12target-arm/translate-a64.c: Unify some of the ldst_reg decodingEdgar E. Iglesias
2016-05-12target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9Edgar E. Iglesias
2016-05-12target-arm: Split data abort syndrome generatorPeter Maydell
2016-05-12target-arm: Fix descriptor address masking in ARM address translationSergey Sorokin
2016-05-12target-arm: Stage 2 permission fault was fixed in AArch32 stateSergey Sorokin
2016-04-04target-arm: Make the 64-bit version of VTCR do the migrationPeter Maydell
2016-04-04target-arm: Remove incorrect ALIAS tags from ESR_EL2 and ESR_EL3Peter Maydell
2016-04-04target-arm: Correctly reset SCTLR_EL3 for 64-bit CPUsPeter Maydell
2016-03-30arm: implement query-gic-capabilitiesPeter Xu
2016-03-30arm: enhance kvm_arm_create_scratch_host_vcpuPeter Xu
2016-03-30arm: qmp: add query-gic-capabilities interfacePeter Xu
2016-03-22target-arm: dfilter support for in_asmAlex Bennée
2016-03-22util: move declarations out of qemu-common.hVeronia Bahaa
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster
2016-03-16target-arm: Fix translation level on early translation faultsSergey Sorokin
2016-03-16target-arm: Implement MRS (banked) and MSR (banked) instructionsPeter Maydell
2016-03-04target-arm: Only trap SRS from S-EL1 if specified mode is MONRalf-Philipp Weinmann
2016-03-04target-arm: implement BE32 mode in system emulationPaolo Bonzini
2016-03-04target-arm: implement setendPaolo Bonzini
2016-03-04target-arm: introduce tbflag for endiannessPeter Crosthwaite
2016-03-04target-arm: a64: Add endianness supportPeter Crosthwaite
2016-03-04target-arm: introduce disas flag for endiannessPaolo Bonzini
2016-03-04target-arm: pass DisasContext to gen_aa32_ld*/st*Paolo Bonzini
2016-03-04target-arm: implement SCTLR.EEPeter Crosthwaite
2016-03-04linux-user: arm: handle CPSR.E correctly in strex emulationPaolo Bonzini
2016-03-04arm: cpu: handle BE32 user-mode as BEPeter Crosthwaite
2016-03-04target-arm: cpu: Move cpu_is_big_endian to headerPeter Crosthwaite
2016-03-04target-arm: implement SCTLR.B, drop bswap_codePaolo Bonzini
2016-03-04target-arm: Correct handling of writes to CPSR mode bits from gdb in usermodePeter Maydell
2016-03-01tcg: Add type for vCPU pointersLluís Vilanova
2016-02-26target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEFPeter Maydell
2016-02-26target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAWEdgar E. Iglesias
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