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path: root/target-arm/translate.c
AgeCommit message (Expand)Author
2013-04-19target-arm: Reinsert missing return statement in ARM mode SRS decodePeter Chubb
2013-03-05target-arm: Don't decode RFE or SRS on M profile coresPeter Maydell
2013-03-05target-arm: Factor out handling of SRS instructionPeter Maydell
2013-03-03gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell
2013-02-25target-arm: Fix sbc_CC carryRichard Henderson
2013-02-25arm/translate.c: Fix adc_CC/sbc_CC implementationPeter Crosthwaite
2013-02-23target-arm: Implement sbc_cc inlineRichard Henderson
2013-02-23target-arm: Implement adc_cc inlineRichard Henderson
2013-02-23target-arm: Use add2 in gen_add_CCRichard Henderson
2013-02-23target-arm: Use mul[us]2 and add2 in umlal et alRichard Henderson
2013-02-23target-arm: Use mul[us]2 in gen_mul[us]_i64_i32Richard Henderson
2013-01-30target-arm: Fix TCG temp leaks for WI and UNDEF VFP sysreg writesPeter Maydell
2012-12-19misc: move include files to include/qemu/Paolo Bonzini
2012-12-19exec: move include files to include/exec/Paolo Bonzini
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin
2012-11-10disas: avoid using cpu_single_envBlue Swirl
2012-10-24target-arm: Implement abs_i32 inline rather than as a helperPeter Maydell
2012-10-24target-arm: Use TCG operation for Neon 64 bit negationPeter Maydell
2012-10-17target-arm/translate: Fix RRX operandsPeter Crosthwaite
2012-10-05target-arm: use deposit instead of hardcoded versionAurelien Jarno
2012-10-05target-arm: convert sar, shl and shr helpers to TCGAurelien Jarno
2012-10-05target-arm: convert add_cc and sub_cc helpers to TCGAurelien Jarno
2012-10-05target-arm: use globals for CC flagsAurelien Jarno
2012-10-05target-arm: Reinstate display of VFP registers in cpu_dump_statePeter Maydell
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
2012-09-15target-arm: final conversion to AREG0 free modeBlue Swirl
2012-09-15target-arm: convert remaining helpersBlue Swirl
2012-09-15target-arm: convert void helpersBlue Swirl
2012-08-10target-arm: Fix typos in commentsPeter Maydell
2012-08-10arm: translate: comment typo - s/middel/middle/Peter A. G. Crosthwaite
2012-07-12target-arm: Fix TCG temp handling in 64 bit cp writesPeter Maydell
2012-07-12target-arm: Fix CP15 based WFIPaul Brook
2012-06-20target-arm: Remove remaining old cp15 infrastructurePeter Maydell
2012-06-20target-arm: Move block cache ops to new cp15 frameworkPeter Maydell
2012-06-20target-arm: Convert performance monitor registersPeter Maydell
2012-06-20target-arm: Convert TLS registersPeter Maydell
2012-06-20target-arm: Convert WFI/barriers special cases to cp_reginfoPeter Maydell
2012-06-20target-arm: Convert TEECR, TEEHBR to new schemePeter Maydell
2012-06-20target-arm: Convert debug registers to cp_reginfoPeter Maydell
2012-06-20target-arm: Remove old cpu_arm_set_cp_io infrastructurePeter Maydell
2012-06-20target-arm: initial coprocessor register frameworkPeter Maydell
2012-04-27target-arm: Make SETEND respect bswap_code (BE8) settingPeter Maydell
2012-04-06Userspace ARM BE8 supportPaul Brook
2012-03-30ARM: Permit any ARMv6K CPU to read the MVFR0 and MVFR1 VFP registers.Andrew Towers
2012-03-15target-arm: Decode SETEND correctly in ThumbPeter Maydell
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