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path: root/target-arm/machine.c
AgeCommit message (Expand)Author
2016-10-04target-arm: move gicv3_class_name from machine to kvm_arm.hEric Auger
2016-07-19target-arm: Fix unreachable code in gicv3_class_name()Peter Maydell
2016-06-17target-arm/machine.c: Allow user to request GICv3 emulationPeter Maydell
2016-05-19qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini
2016-05-19hw: move CPU state serialization to migration/cpu.hPaolo Bonzini
2016-02-26target-arm: Raw CPSR writes should skip checks and bank switchingPeter Maydell
2016-02-26target-arm: Add write_type argument to cpsr_write()Peter Maydell
2016-01-18target-arm: Clean up includesPeter Maydell
2016-01-13error: Strip trailing '\n' from error string arguments (again)Markus Armbruster
2015-09-24hw/intc: Initial implementation of vGICv3Pavel Fedin
2015-07-21target-arm: kvm: Differentiate registers based on write-back levelsChristoffer Dall
2015-06-19target-arm: Add registers for PMSAv7Peter Crosthwaite
2015-06-12migration: Use normal VMStateDescriptions for SubsectionsJuan Quintela
2015-01-26vmstate: accept QEMUTimer in VMSTATE_TIMER*, add VMSTATE_TIMER_PTR*Paolo Bonzini
2014-12-11target-arm: Support save/load for 64 bit CPUsPeter Maydell
2014-10-24target-arm: increase arrays of registers R13 & R14Fabian Aggeler
2014-10-24target-arm: add powered off cpu stateRob Herring
2014-09-29target-arm: Implement setting guest breakpointsPeter Maydell
2014-09-12target-arm: Implement setting of watchpointsPeter Maydell
2014-05-27target-arm: Add SPSR entries for EL2/HYP and EL3/MONEdgar E. Iglesias
2014-05-27target-arm: A64: Add ELR entries for EL2 and 3Edgar E. Iglesias
2014-05-27target-arm: A64: Add SP entries for EL2 and 3Edgar E. Iglesias
2014-05-27target-arm: Make elr_el1 an arrayEdgar E. Iglesias
2014-05-13savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela
2014-05-05vmstate: s/VMSTATE_INT32_LE/VMSTATE_INT32_POSITIVE_LE/Michael S. Tsirkin
2014-04-17target-arm: Implement AArch64 SPSR_EL1Peter Maydell
2014-04-17target-arm: Implement SP_EL0, SP_EL1Peter Maydell
2014-04-17target-arm: Add AArch64 ELR_EL1 register.Peter Maydell
2014-04-17target-arm: Define exception record for AArch64 exceptionsPeter Maydell
2014-03-27target-arm: Add missing 'static' attributeStefan Weil
2014-01-08target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell
2013-09-10target-arm: Prepare translation for AArch64 codeAlexander Graf
2013-08-20target-arm: Implement the generic timerPeter Maydell
2013-06-25target-arm: Initialize cpreg list from KVM when using KVMPeter Maydell
2013-06-25target-arm: Convert TCG to using (index,value) list for cp migrationPeter Maydell
2013-04-19target-arm: Correctly restore FPSCRPeter Maydell
2013-04-19target-arm: Add some missing CPU state fields to VMStatePeter Maydell
2013-04-19target-arm: port ARM CPU save/load to use VMStateJuan Quintela
2012-07-12target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAEPeter Maydell
2012-07-12target-arm: Extend feature flags to 64 bitsPeter Maydell
2012-06-20target-arm: Remove c0_cachetype CPUARMState fieldPeter Maydell
2012-01-13arm: Add dummy support for co-processor 15's secure config registerRob Herring
2012-01-05arm: add dummy A9-specific cp15 registersMark Langsdorf
2011-10-19target-arm/machine.c: Restore VFP registers correctlyDmitry Koshelev
2011-06-22target-arm: Minimal implementation of performance countersPeter Maydell
2011-03-06target-arm: Implement cp15 VA->PA translationAdam Lackorzynski
2009-07-31Save/restore ARMv6 MMU statePaul Brook
2009-05-21Convert machine registration to use module init functionsAnthony Liguori
2009-05-14Syborg (Symbian Virtual Platform) boardPaul Brook
2008-12-15ARM: basic SX1-cellphone sysemu support (Jean-Christophe PLAGNIOL-VILLARD).balrog
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