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QEMU is a generic and open source machine & userspace emulator and virtualizer.
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cpu64.c
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Author
2016-03-22
include/qemu/osdep.h: Don't include qapi/error.h
Markus Armbruster
2016-02-18
target-arm: Add the pmceid0 and pmceid1 registers
Alistair Francis
2016-02-11
target-arm: Enable EL3 for Cortex-A53 and Cortex-A57
Peter Maydell
2016-01-27
gdb: provide the name of the architecture in the target.xml
David Hildenbrand
2016-01-21
target-arm: Use a single entry point for AArch64 and AArch32 exceptions
Peter Maydell
2016-01-18
target-arm: Clean up includes
Peter Maydell
2015-06-15
target-arm: Fix REVIDR reset value
Sergey Fedorov
2015-06-15
target-arm/kvm64: Add cortex-a53 cpu support
Shannon Zhao
2015-05-18
target-arm: cpu64: Add support for Cortex-A53
Peter Crosthwaite
2015-05-18
target-arm: cpu64: generalise name of A57 regs
Peter Crosthwaite
2015-03-11
target-arm: Add missing compatible property to A57
Ryota Ozaki
2015-02-13
target-arm: Add CPU property to disable AArch64
Greg Bellows
2014-10-24
target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any"
Peter Maydell
2014-10-24
target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes
Rob Herring
2014-09-25
target-arm: Use cpu_exec_interrupt qom hook
Richard Henderson
2014-08-29
target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values
Peter Maydell
2014-08-19
target-arm: Adjust debug ID registers per-CPU
Peter Maydell
2014-06-09
target-arm: VFPv4 implies half-precision extension
Peter Maydell
2014-06-09
target-arm: Clean up handling of ARMv8 optional feature bits
Peter Maydell
2014-06-09
target-arm: Remove unnecessary setting of feature bits
Peter Maydell
2014-06-09
target-arm/cpu64.c: Actually register Cortex-A57 impdef registers
Peter Maydell
2014-04-17
target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32
Peter Maydell
2014-04-17
target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pc
Peter Maydell
2014-04-17
target-arm: Implement CBAR for Cortex-A57
Peter Maydell
2014-04-17
target-arm: Implement Cortex-A57 implementation-defined system registers
Peter Maydell
2014-04-17
target-arm: Remove THUMB2EE feature from AArch64 'any' CPU
Peter Maydell
2014-04-17
target-arm: Add Cortex-A57 processor
Peter Maydell
2014-04-17
target-arm: Implement AArch64 EL1 exception handling
Rob Herring
2014-04-17
target-arm: A64: Implement DC ZVA
Peter Maydell
2014-02-26
target-arm: A64: Make cache ID registers visible to AArch64
Peter Maydell
2014-01-14
target-arm: Switch ARMCPUInfo arrays to use terminator entries
Peter Maydell
2014-01-08
target-arm: fix build with gcc 4.8.2
Michael S. Tsirkin
2013-12-17
target-arm: A64: add set_pc cpu method
Alexander Graf
2013-09-10
target-arm: Add AArch64 gdbstub support
Alexander Graf
2013-09-10
target-arm: Add AArch64 translation stub
Alexander Graf
2013-09-10
target-arm: Add new AArch64CPUInfo base class and subclasses
Peter Maydell