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2021-05-26cpu: Move CPUClass::get_crash_info to SysemuCPUOpsPhilippe Mathieu-Daudé
cpu_get_crash_info() is called on GUEST_PANICKED events, which only occur in system emulation. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-18-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOpsPhilippe Mathieu-Daudé
VirtIO devices are only meaningful with system emulation. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-17-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Move CPUClass::vmsd to SysemuCPUOpsPhilippe Mathieu-Daudé
Migration is specific to system emulation. - Move the CPUClass::vmsd field to SysemuCPUOps, - restrict VMSTATE_CPU() macro to sysemu, - vmstate_dummy is now unused, remove it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-16-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé
Introduce a structure to hold handler specific to sysemu. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-15-f4bug@amsat.org> [rth: Squash "restrict hw/core/sysemu-cpu-ops.h" patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Rename CPUClass vmsd -> legacy_vmsdPhilippe Mathieu-Daudé
Quoting Peter Maydell [*]: There are two ways to handle migration for a CPU object: (1) like any other device, so it has a dc->vmsd that covers migration for the whole object. As usual for objects that are a subclass of a parent that has state, the first entry in the VMStateDescription field list is VMSTATE_CPU(), which migrates the cpu_common fields, followed by whatever the CPU's own migration fields are. (2) a backwards-compatible mechanism for CPUs that were originally migrated using manual "write fields to the migration stream structures". The on-the-wire migration format for those is based on the 'env' pointer (which isn't a QOM object), and the cpu_common part of the migration data is elsewhere. cpu_exec_realizefn() handles both possibilities: * for type 1, dc->vmsd is set and cc->vmsd is not, so cpu_exec_realizefn() does nothing, and the standard "register dc->vmsd for a device" code does everything needed * for type 2, dc->vmsd is NULL and so we register the vmstate_cpu_common directly to handle the cpu-common fields, and the cc->vmsd to handle the per-CPU stuff You can't change a CPU from one type to the other without breaking migration compatibility, which is why some guest architectures are stuck on the cc->vmsd form. New targets should use dc->vmsd. To avoid new targets to start using type (2), rename cc->vmsd as cc->legacy_vmsd. The correct field to implement is dc->vmsd (the DeviceClass one). See also commit b170fce3dd0 ("cpu: Register VMStateDescription through CPUState") for historic background. [*] https://www.mail-archive.com/qemu-devel@nongnu.org/msg800849.html Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210517105140.1062037-13-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Introduce cpu_virtio_is_big_endian()Philippe Mathieu-Daudé
Introduce the cpu_virtio_is_big_endian() generic helper to avoid calling CPUClass internal virtio_is_big_endian() one. Similarly to commit bf7663c4bd8 ("cpu: introduce CPUClass::virtio_is_big_endian()"), we keep 'virtio' in the method name to hint this handler shouldn't be called anywhere but from the virtio code. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-8-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrsPhilippe Mathieu-Daudé
To be able to later extract the cpu_get_phys_page_debug() and cpu_asidx_from_attrs() handlers from CPUClass, un-inline them from "hw/core/cpu.h". Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-7-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26accel/tcg: Keep TranslationBlock headers local to TCGPhilippe Mathieu-Daudé
Only the TCG accelerator uses the TranslationBlock API. Move the tb-context.h / tb-hash.h / tb-lookup.h from the global namespace to the TCG one (in accel/tcg). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210524170453.3791436-3-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26accel/tcg: Reduce 'exec/tb-context.h' inclusionPhilippe Mathieu-Daudé
Only 2 headers require "exec/tb-context.h". Instead of having all files including "exec/exec-all.h" also including it, directly include it where it is required: - accel/tcg/cpu-exec.c - accel/tcg/translate-all.c For plugins/plugin.h, we were implicitly relying on exec/exec-all.h -> exec/tb-context.h -> qemu/qht.h which is now included directly. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210524170453.3791436-2-f4bug@amsat.org> [rth: Fix plugins/plugin.h compilation] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26exec/memory: Use correct type sizePhilippe Mathieu-Daudé
Use uint8_t for (unsigned) byte. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210518183655.1711377-7-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26exec/memory_ldst_cached: Use correct type sizePhilippe Mathieu-Daudé
Use uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210518183655.1711377-6-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26exec/memory_ldst_phys: Use correct type sizesPhilippe Mathieu-Daudé
Use uint8_t for (unsigned) byte, and uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210518183655.1711377-5-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26exec/memory_ldst: Use correct type sizesPhilippe Mathieu-Daudé
Use uint8_t for (unsigned) byte, and uint16_t for (unsigned) 16-bit word. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210518183655.1711377-4-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26exec/memory_ldst_phys: Sort declarationsPhilippe Mathieu-Daudé
To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210518183655.1711377-3-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26exec/memory_ldst_cached: Sort declarationsPhilippe Mathieu-Daudé
To ease the file review, sort the declarations by the size of the access (8, 16, 32). Simple code movement, no logical change. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210518183655.1711377-2-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-25accel/tlb: Add tlb_flush_range_by_mmuidx_all_cpus_synced()Richard Henderson
Forward tlb_flush_page_bits_by_mmuidx_all_cpus_synced to tlb_flush_range_by_mmuidx_all_cpus_synced passing TARGET_PAGE_SIZE. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210509151618.2331764-7-f4bug@amsat.org Message-Id: <20210508201640.1045808-1-richard.henderson@linaro.org> [PMD: Split from bigger patch] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-25accel/tcg: Add tlb_flush_range_by_mmuidx_all_cpus()Richard Henderson
Forward tlb_flush_page_bits_by_mmuidx_all_cpus to tlb_flush_range_by_mmuidx_all_cpus passing TARGET_PAGE_SIZE. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210509151618.2331764-6-f4bug@amsat.org Message-Id: <20210508201640.1045808-1-richard.henderson@linaro.org> [PMD: Split from bigger patch] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-25accel/tcg: Add tlb_flush_range_by_mmuidx()Richard Henderson
Forward tlb_flush_page_bits_by_mmuidx to tlb_flush_range_by_mmuidx passing TARGET_PAGE_SIZE. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210509151618.2331764-5-f4bug@amsat.org Message-Id: <20210508201640.1045808-1-richard.henderson@linaro.org> [PMD: Split from bigger patch] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-25hw/arm: Model TCMs in the SSE-300, not the AN547Peter Maydell
The SSE-300 has an ITCM at 0x0000_0000 and a DTCM at 0x2000_0000. Currently we model these in the AN547 board, but this is conceptually wrong, because they are a part of the SSE-300 itself. Move the modelling of the TCMs out of mps2-tz.c into sse300.c. This has no guest-visible effects. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210510190844.17799-7-peter.maydell@linaro.org
2021-05-24Merge remote-tracking branch ↵Peter Maydell
'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request (Resent due to an email preparation mistake.) # gpg: Signature made Mon 24 May 2021 14:01:42 BST # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: coroutine-sleep: introduce qemu_co_sleep coroutine-sleep: replace QemuCoSleepState pointer with struct in the API coroutine-sleep: move timer out of QemuCoSleepState coroutine-sleep: allow qemu_co_sleep_wake that wakes nothing coroutine-sleep: disallow NULL QemuCoSleepState** argument coroutine-sleep: use a stack-allocated timer bitops.h: Improve find_xxx_bit() documentation multi-process: Initialize variables declared with g_auto* Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-21coroutine-sleep: introduce qemu_co_sleepPaolo Bonzini
Allow using QemuCoSleep to sleep forever until woken by qemu_co_sleep_wake. This makes the logic of qemu_co_sleep_ns_wakeable easy to understand. In the future we will introduce an API that can work even if the sleep and wake happen from different threads. For now, initializing w->to_wake after timer_mod is fine because the timer can only fire in the same AioContext. Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20210517100548.28806-7-pbonzini@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-05-21coroutine-sleep: replace QemuCoSleepState pointer with struct in the APIPaolo Bonzini
Right now, users of qemu_co_sleep_ns_wakeable are simply passing a pointer to QemuCoSleepState by reference to the function. But QemuCoSleepState really is just a Coroutine*; making the content of the struct public is just as efficient and lets us skip the user_state_pointer indirection. Since the usage is changed, take the occasion to rename the struct to QemuCoSleep. Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20210517100548.28806-6-pbonzini@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-05-21coroutine-sleep: disallow NULL QemuCoSleepState** argumentPaolo Bonzini
Simplify the code by removing conditionals. qemu_co_sleep_ns can simply point the argument to an on-stack temporary. Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20210517100548.28806-3-pbonzini@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-05-21bitops.h: Improve find_xxx_bit() documentationPhilippe Mathieu-Daudé
Document the following functions return the bitmap size if no matching bit is found: - find_first_bit - find_next_bit - find_last_bit - find_first_zero_bit - find_next_zero_bit Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20210510200758.2623154-2-philmd@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2021-05-21ui/gtk: add clipboard supportGerd Hoffmann
This patch adds clipboard support to the qemu gtk ui. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20210519053940.1888907-1-kraxel@redhat.com Message-Id: <20210519053940.1888907-10-kraxel@redhat.com>
2021-05-21ui/gtk: move struct GtkDisplayState to ui/gtk.hGerd Hoffmann
Want place gtk clipboard code in a separate C file, which in turn requires GtkDisplayState being in a header file. So move it. No functional change. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20210519053940.1888907-1-kraxel@redhat.com Message-Id: <20210519053940.1888907-9-kraxel@redhat.com>
2021-05-21ui: add clipboard documentationGerd Hoffmann
Document clipboard infrastructure in qemu. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20210519053940.1888907-1-kraxel@redhat.com Message-Id: <20210519053940.1888907-4-kraxel@redhat.com>
2021-05-21ui: add clipboard infrastructureGerd Hoffmann
Add some infrastructure to manage the clipboard in qemu. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20210519053940.1888907-1-kraxel@redhat.com Message-Id: <20210519053940.1888907-3-kraxel@redhat.com>
2021-05-20Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2' into staging testing and plugin updates: - various fixes for binfmt_misc docker images - add hexagon check-tcg support docker image - add tricore check-tcg support - refactor ppc docker images - add missing ppc64le tests - don't use host_cc for test fallback - check-tcg configure.sh tweaks for cross compile/clang - fix some memory leaks in plugins # gpg: Signature made Tue 18 May 2021 09:37:21 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2: (29 commits) configure: use cc, not host_cc to set cross_cc for build arch tests/tcg: don't allow clang as a cross compiler tests/tcg: fix missing return tests/tcg/ppc64le: tests for brh/brw/brd tests/docker: gcc-10 based images for ppc64{,le} tests tests/tcg/tricore: Add muls test tests/tcg/tricore: Add msub test tests/tcg/tricore: Add madd test tests/tcg/tricore: Add ftoi test tests/tcg/tricore: Add fmul test tests/tcg/tricore: Add fadd test tests/tcg/tricore: Add dvstep test tests/tcg/tricore: Add clz test tests/tcg/tricore: Add bmerge test tests/tcg/tricore: Add macros to create tests and first test 'abs' configure: Emit HOST_CC to config-host.mak tests/tcg/tricore: Add build infrastructure hw/tricore: Add testdevice for tests in tests/tcg/ tests/tcg: Run timeout cmds using --foreground tests/tcg: Add docker_as and docker_ld cmds ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-19Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210519' ↵Peter Maydell
into staging ppc patch queue 2021-05-19 Next set of ppc related patches for qemu-6.1. Highlights are: * Start of a significant softmmu cleanup from Richard Henderson * Further work towards allowing builds without CONFIG_TCG # gpg: Signature made Wed 19 May 2021 13:36:45 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210519: (48 commits) target/ppc: Remove type argument for mmubooke206_get_physical_address target/ppc: Remove type argument from mmubooke206_check_tlb target/ppc: Remove type argument from mmubooke_get_physical_address target/ppc: Remove type argument from mmubooke_check_tlb target/ppc: Remove type argument from mmu40x_get_physical_address target/ppc: Remove type argument from get_bat_6xx_tlb target/ppc: Remove type argument from ppc6xx_tlb_check target/ppc: Remove type argument from ppc6xx_tlb_pte_check target/ppc: Remove type argument from check_prot target/ppc: Use MMUAccessType in mmu_helper.c target/ppc: Rename access_type to type in mmu_helper.c target/ppc: Use MMUAccessType in mmu-hash32.c target/ppc: Use MMUAccessType in mmu-hash64.c target/ppc: Use MMUAccessType in mmu-radix64.c target/ppc: Introduce prot_for_access_type target/ppc: Fix load endianness for lxvwsx/lxvdsx target/ppc: Use translator_loop_temp_check target/ppc: Mark helper_raise_exception* as noreturn target/ppc: Tidy exception vs exit_tb target/ppc: Move single-step check to ppc_tr_tb_stop ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-19Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell
Block layer patches - vhost-user-blk: Fix error handling during initialisation - Add test cases for the vhost-user-blk export - Fix leaked Transaction objects - qcow2: Expose dirty bit in 'qemu-img info' # gpg: Signature made Tue 18 May 2021 11:57:46 BST # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: vhost-user-blk: Check that num-queues is supported by backend virtio: Fail if iommu_platform is requested, but unsupported vhost-user-blk: Get more feature flags from vhost device vhost-user-blk: Improve error reporting in realize vhost-user-blk: Don't reconnect during initialisation vhost-user-blk: Make sure to set Error on realize failure vhost-user-blk-test: test discard/write zeroes invalid inputs tests/qtest: add multi-queue test case to vhost-user-blk-test test: new qTest case to test the vhost-user-blk-server block/export: improve vu_blk_sect_range_ok() block: Fix Transaction leak in bdrv_reopen_multiple() block: Fix Transaction leak in bdrv_root_attach_child() qcow2: set bdi->is_dirty Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-19hw/ppc: moved hcalls that depend on softmmuLucas Mateus Castro (alqotel)
The hypercalls h_enter, h_remove, h_bulk_remove, h_protect, and h_read, have been moved to spapr_softmmu.c with the functions they depend on. The functions is_ram_address and push_sregs_to_kvm_pr are not static anymore as functions on both spapr_hcall.c and spapr_softmmu.c depend on them. The hypercalls h_resize_hpt_prepare and h_resize_hpt_commit have been divided, the KVM part stayed in spapr_hcall.c while the softmmu part was moved to spapr_softmmu.c Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210506163941.106984-2-lucas.araujo@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-19hw/ppc/spapr.c: Extract MMU mode error reporting into a functionFabiano Rosas
A following patch will make use of it. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20210505001130.3999968-2-farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-05-18Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into ↵Peter Maydell
staging emulated nvme updates * various fixes (Gollu Appalanaidu) * refactoring (me) * move to hw/nvme from hw/block (me) # gpg: Signature made Mon 17 May 2021 10:16:01 BST # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown] # gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * remotes/nvme/tags/nvme-next-pull-request: hw/nvme: move nvme emulation out of hw/block hw/block/nvme: move zoned constraints checks hw/block/nvme: remove irrelevant zone resource checks hw/block/nvme: remove num_namespaces member hw/block/nvme: streamline namespace array indexing hw/block/nvme: add metadata offset helper hw/block/nvme: cache lba and ms sizes hw/block/nvme: replace nvme_ns_status hw/block/nvme: remove non-shared defines from header file hw/block/nvme: cleanup includes hw/block/nvme: consolidate header files hw/block/nvme: rename __nvme_select_ns_iocs hw/block/nvme: rename __nvme_advance_zone_wp hw/block/nvme: rename __nvme_zrm_open hw/block/nvme: align with existing style hw/block/nvme: function formatting fix hw/block/nvme: fix io-command set profile feature hw/block/nvme: consider metadata read aio return value in compare hw/block/nvme: rename reserved fields declarations hw/block/nvme: remove redundant invalid_lba_range trace Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-18vhost-user-blk: Check that num-queues is supported by backendKevin Wolf
Creating a device with a number of queues that isn't supported by the backend is pointless, the device won't work properly and the error messages are rather confusing. Just fail to create the device if num-queues is higher than what the backend supports. Since the relationship between num-queues and the number of virtqueues depends on the specific device, this is an additional value that needs to be initialised by the device. For convenience, allow leaving it 0 if the check should be skipped. This makes sense for vhost-user-net where separate vhost devices are used for the queues and custom initialisation code is needed to perform the check. Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1935031 Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Message-Id: <20210429171316.162022-7-kwolf@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2021-05-18Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210516' ↵Peter Maydell
into staging Minor MAINTAINERS update. Tweak to includes. Add tcg_constant_tl. Improve constant pool dump. # gpg: Signature made Sun 16 May 2021 15:08:42 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-tcg-20210516: accel/tcg: Align data dumped at end of TB tcg: Add tcg_constant_tl exec/gen-icount.h: Add missing "exec/exec-all.h" include MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-18hw/tricore: Add testdevice for tests in tests/tcg/Bastian Koppelmann
this device is used to verify the correctness of regression tests by allowing guests to write their exit status to this device. This is then used by qemu to exit using the written status. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210305170045.869437-4-kbastian@mail.uni-paderborn.de> Message-Id: <20210512102051.12134-14-alex.bennee@linaro.org>
2021-05-17Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-fp-20210516' into ↵Peter Maydell
staging Reorg FloatParts to use QEMU_GENERIC. Begin replacing the Berkeley float128 routines with FloatParts128. - includes a new implementation of float128_muladd - includes the snan silencing that was missing from float{32,64}_to_float128 and float128_to_float{32,64}. - does not include float128_min/max* (written but not yet reviewed). # gpg: Signature made Sun 16 May 2021 13:27:10 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-fp-20210516: (46 commits) softfloat: Move round_to_int_and_pack to softfloat-parts.c.inc softfloat: Move round_to_int to softfloat-parts.c.inc softfloat: Convert float-to-float conversions with float128 softfloat: Split float_to_float softfloat: Move div_floats to softfloat-parts.c.inc softfloat: Introduce sh[lr]_double primitives softfloat: Tidy mul128By64To192 softfloat: Use add192 in mul128To256 softfloat: Use mulu64 for mul64To128 softfloat: Move muladd_floats to softfloat-parts.c.inc softfloat: Move mul_floats to softfloat-parts.c.inc softfloat: Implement float128_add/sub via parts softfloat: Move addsub_floats to softfloat-parts.c.inc softfloat: Use uadd64_carry, usub64_borrow in softfloat-macros.h softfloat: Move round_canonical to softfloat-parts.c.inc softfloat: Move sf_canonicalize to softfloat-parts.c.inc softfloat: Move pick_nan_muladd to softfloat-parts.c.inc softfloat: Move pick_nan to softfloat-parts.c.inc softfloat: Move return_nan to softfloat-parts.c.inc softfloat: Convert float128_default_nan to parts ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-17Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2021-05-14' ↵Peter Maydell
into staging Block patches: - drop block/io write notifiers - qemu-iotests enhancements to make debugging easier - rbd parsing fix - HMP qemu-io fix (for iothreads) - mirror job cancel relaxation (do not cancel in-flight requests when a READY mirror job is canceled with force=false) - document qcow2's data_file and data_file_raw features - fix iotest 297 for pylint 2.8 - block/copy-on-read refactoring # gpg: Signature made Fri 14 May 2021 17:43:40 BST # gpg: using RSA key 91BEB60A30DB3E8857D11829F407DB0061D5CF40 # gpg: issuer "mreitz@redhat.com" # gpg: Good signature from "Max Reitz <mreitz@redhat.com>" [full] # Primary key fingerprint: 91BE B60A 30DB 3E88 57D1 1829 F407 DB00 61D5 CF40 * remotes/maxreitz/tags/pull-block-2021-05-14: write-threshold: deal with includes test-write-threshold: drop extra TestStruct structure test-write-threshold: drop extra tests block/write-threshold: drop extra APIs test-write-threshold: rewrite test_threshold_(not_)trigger tests block: drop write notifiers block/write-threshold: don't use write notifiers qemu-iotests: fix pylint 2.8 consider-using-with error block/copy-on-read: use bdrv_drop_filter() and drop s->active Document qemu-img options data_file and data_file_raw qemu-iotests: fix case of SOCK_DIR already in the environment qemu-iotests: let "check" spawn an arbitrary test command qemu-iotests: move command line and environment handling from TestRunner to TestEnv qemu-iotests: allow passing unittest.main arguments to the test scripts qemu-iotests: do not buffer the test output mirror: stop cancelling in-flight requests on non-force cancel in READY monitor: hmp_qemu_io: acquire aio contex, fix crash block/rbd: Add an escape-aware strchr helper iotests/231: Update expected deprecation message Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-17hw/block/nvme: align with existing styleGollu Appalanaidu
While QEMU coding style prefers lowercase hexadecimals in constants, the NVMe subsystem uses the format from the NVMe specifications in comments, i.e. 'h' suffix instead of '0x' prefix. Fix this up across the code base. Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> [k.jensen: updated message; added conversion in a couple of missing comments] Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2021-05-17hw/block/nvme: rename reserved fields declarationsGollu Appalanaidu
Align the 'rsvd1' reserved field declaration in NvmeBar with existing style. Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> [k.jensen: minor commit message fixup] Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2021-05-16Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
pc,pci,virtio: bugfixes, improvements Fixes all over the place. Faster boot for virtio. ioeventfd support for mmio. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 14 May 2021 15:27:13 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: Fix build with 64 bits time_t vhost-vdpa: Make vhost_vdpa_get_device_id() static hw/virtio: enable ioeventfd configuring for mmio hw/smbios: support for type 41 (onboard devices extended information) checkpatch: Fix use of uninitialized value virtio-scsi: Configure all host notifiers in a single MR transaction virtio-scsi: Set host notifiers and callbacks separately virtio-blk: Configure all host notifiers in a single MR transaction virtio-blk: Fix rollback path in virtio_blk_data_plane_start() pc-dimm: remove unnecessary get_vmstate_memory_region() method amd_iommu: fix wrong MMIO operations virtio-net: Constify VirtIOFeature feature_sizes[] virtio-blk: Constify VirtIOFeature feature_sizes[] hw/virtio: Pass virtio_feature_get_config_size() a const argument x86: acpi: use offset instead of pointer when using build_header() amd_iommu: Fix pte_override_page_mask() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/arm/virt.c
2021-05-16softfloat: Introduce sh[lr]_double primitivesRichard Henderson
Have x86_64 assembly for them, with a fallback. This avoids shuffling values through %cl in the x86 case. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-16softfloat: Tidy mul128By64To192Richard Henderson
Clean up the formatting and variables; no functional change. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-16softfloat: Use add192 in mul128To256Richard Henderson
We can perform the operation in 6 total adds instead of 8. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-16softfloat: Use mulu64 for mul64To128Richard Henderson
Via host-utils.h, we use a host widening multiply for 64-bit hosts, and a common subroutine for 32-bit hosts. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-16softfloat: Move muladd_floats to softfloat-parts.c.incRichard Henderson
Rename to parts$N_muladd. Implement float128_muladd with FloatParts128. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-16softfloat: Use uadd64_carry, usub64_borrow in softfloat-macros.hRichard Henderson
Use compiler support for carry arithmetic. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-16softfloat: Inline float_raiseRichard Henderson
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-16qemu/host-utils: Add wrappers for carry builtinsRichard Henderson
These builtins came in clang 3.8, but are not present in gcc through version 11. Even in clang the optimization is only ideal on x86_64, but never worse than the hand-coding that we currently do. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 13:56:22 +0000