summaryrefslogtreecommitdiff
path: root/include/hw
AgeCommit message (Collapse)Author
2020-01-07omap-gpio: remove PROP_PTRMarc-André Lureau
Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. Move/adapt the existing TODO comment about a clock framework. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07omap-i2c: remove PROP_PTRMarc-André Lureau
Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07omap-intc: remove PROP_PTRMarc-André Lureau
Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. (in theory there should probably be different methods for omap1 & omap2 intc, but this is left as a future improvement) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07etraxfs: remove PROP_PTR usageMarc-André Lureau
etraxfs_dma_client are not Object, so can't be exposed to user with QOM path. Let's remove property usage and move the constructor to the .c unit, simplifying some code on the way. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07vmmouse: replace PROP_PTR with PROP_LINKMarc-André Lureau
While at it, use the expected type. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07mips: inline serial_init()Marc-André Lureau
The function is specific to mipssim, let's inline it. (when inlining, we use a DeviceState variable instead of SerialIO, as it is the most common type used, and avoids having too many casts) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2020-01-07serial: make SerialIO a sysbus deviceMarc-André Lureau
Make serial IO a proper sysbus device, similar to serial MM. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07serial-mm: add endianness propertyMarc-André Lureau
Add a qdev property for endianness, so memory region setup can be done in realize. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07serial-mm: add "regshift" propertyMarc-André Lureau
And a property and rename "it_shift" field to "regshift", as it seems to be more popular (and I don't know what "it" stands for). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07serial: start making SerialMM a sysbus deviceMarc-André Lureau
Memory mapped serial device is in fact a sysbus device. The following patches will make use of sysbus facilities for resource and registration. In particular, "serial-mm: use sysbus facilities" will move internal serial realization to serial_mm_realize callback to follow qdev best practices. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07serial: replace serial_exit_core() with unrealizeMarc-André Lureau
Instead of calling serial_exit_core() directly, use the QDev unrealize callback. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07serial: realize the serial deviceMarc-André Lureau
Instead of calling serial_realize_core(), use the QDev realize callback. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07serial: add "baudbase" propertyMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07serial: initial qom-ificationMarc-André Lureau
Make SerialState a device (the following patches will introduce IO/MM sysbus serial devices) None of the serial_{,mm}_init() callers actually free the returned value (even if they did, it would be quite harmless), so we can change the object allocation at will. However, the devices that embed SerialState must now have their field QOM-initialized manually (isa, pci, pci-multi). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-07sysbus: remove outdated commentMarc-André Lureau
The init callback is no more since commit 817a17fc60f44e29a1944b60d32f45ea127f0cf9 ("core/sysbus: remove the SysBusDeviceClass::init path") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-01-07sysbus: remove unused sysbus_try_create*Marc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-06vmstate: add qom interface to get idMarc-André Lureau
Add an interface to get the instance id, instead of depending on Device and qdev_get_dev_path(). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2019-12-18hw/pci: Remove the "command_serr_enable" propertyThomas Huth
Now that the old pc-0.x machine types have been removed, this config knob is not required anymore. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20191209125248.5849-4-thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-18hw/pci-host/i440fx: Extract PCII440FXState to "hw/pci-host/i440fx.h"Philippe Mathieu-Daudé
Make the PCII440FXState structure public, so it can be used out of this source file. This will allow us to extract the IGD Passthrough Host Bridge, which is a children of the TYPE_I440FX_PCI_DEVICE. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20191209095002.32194-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17hw/i386/pc: Extract the port92 devicePhilippe Mathieu-Daudé
This device is only used by the PC machines. The pc.c file is already big enough, with 2255 lines. By removing 113 lines of it, we reduced it by 5%. It is now a bit easier to navigate the file. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17hw/isa/isa-bus: cleanup irq functionsPaolo Bonzini
The irq number is unsigned; we reject negative values. But -1 is used for the isairq array, which is declared unsigned! And since we have a definition for the number of ISA IRQs, use it. Based on a patch by Philippe Mathieu-Daudé. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17x86: move more x86-generic functions out of PC filesPaolo Bonzini
These are needed by microvm too, so move them outside of PC-specific files. With this patch, microvm.c need not include pc.h anymore. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17x86: move SMM property to X86MachineStatePaolo Bonzini
Add it to microvm as well, it is a generic property of the x86 architecture. Suggested-by: Sergio Lopez <slp@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17hw: replace hw/i386/pc.h with a header just for the i8259Paolo Bonzini
Remove the need to include i386/pc.h to get to the i8259 functions. This is enough to remove the inclusion of hw/i386/pc.h from all non-x86 files. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17kvm: convert "-machine kernel_irqchip" to an accelerator propertyPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17kvm: convert "-machine kvm_shadow_mem" to an accelerator propertyPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17xen: convert "-machine igd-passthru" to an accelerator propertyPaolo Bonzini
The first machine property to fall is Xen's Intel integrated graphics passthrough. The "-machine igd-passthru" option does not set anymore a property on the machine object, but desugars to a GlobalProperty on accelerator objects. The setter is very simple, since the value ends up in a global variable, so this patch also provides an example before the more complicated cases that follow it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17vl: configure accelerators from -accel optionsPaolo Bonzini
Drop the "accel" property from MachineState, and instead desugar "-machine accel=" to a list of "-accel" options. This has a semantic change due to removing merge_lists from -accel. For example: - "-accel kvm -accel tcg" all but ignored "-accel kvm". This is a bugfix. - "-accel kvm -accel thread=single" ignored "thread=single", since it applied the option to KVM. Now it fails due to not specifying the accelerator on "-accel thread=single". - "-accel tcg -accel thread=single" chose single-threaded TCG, while now it will fail due to not specifying the accelerator on "-accel thread=single". Also, "-machine accel" and "-accel" become incompatible. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-12-17Merge remote-tracking branch ↵Peter Maydell
'remotes/huth-gitlab/tags/pull-request-2019-12-17' into staging * Removal of the deprecated bluetooth code * Some qtest and misc patches # gpg: Signature made Tue 17 Dec 2019 08:09:08 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2019-12-17: tests: use g_test_rand_int tests/Makefile: Fix check-report.* targets shown in check-help glib: use portable g_setenv() hw/misc/ivshmem: Bury dead legacy INTx code pseries: disable migration-test if /dev/kvm cannot be used tests: fix modules-test 'duplicate test case' error Remove libbluetooth / bluez from the CI tests Remove the core bluetooth code hw/usb: Remove the USB bluetooth dongle device hw/arm/nseries: Replace the bluetooth chardev with a "null" chardev Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-12-17Remove the core bluetooth codeThomas Huth
It's been deprecated since QEMU v3.1. We've explicitly asked in the deprecation message that people should speak up on qemu-devel in case they are still actively using the bluetooth part of QEMU, but nobody ever replied that they are really still using it. I've tried it on my own to use this bluetooth subsystem for one of my guests, but I was also not able to get it running anymore: When I was trying to pass-through a real bluetooth device, either the guest did not see the device at all, or the guest crashed. Even worse for the emulated device: When running qemu-system-x86_64 -bt device:keyboard QEMU crashes once you hit a key. So it seems like the bluetooth stack is not only neglected, it is completely bitrotten, as far as I can tell. The only attention that this code got during the past years were some CVEs that have been spotted there. So this code is a burden for the developers, without any real benefit anymore. Time to remove it. Note: hw/bt/Kconfig only gets cleared but not removed here yet. Otherwise there is a problem with the *-softmmu/config-devices.mak.d dependency files - they still contain a reference to this file which gets evaluated first on some build hosts, before the file gets properly recreated. To avoid breaking these builders, we still need the file around for some time. It will get removed in a couple of weeks instead. Message-Id: <20191120091014.16883-4-thuth@redhat.com> Reviewed-by: Ján Tomko <jtomko@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-12-17ppc/pnv: Drop PnvChipClass::typeGreg Kurz
It isn't used anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623844102.360005.12070225703151669294.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Introduce PnvChipClass::xscom_pcba() methodGreg Kurz
The XSCOM bus is implemented with a QOM interface, which is mostly generic from a CPU type standpoint, except for the computation of addresses on the Pervasive Connect Bus (PCB) network. This is handled by the pnv_xscom_pcba() function with a switch statement based on the chip_type class level attribute of the CPU chip. This can be achieved using QOM. Also the address argument is masked with PNV_XSCOM_SIZE - 1, which is for POWER8 only. Addresses may have different sizes with other CPU types. Have each CPU chip type handle the appropriate computation with a QOM xscom_pcba() method. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623843543.360005.13996472463887521794.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Drop pnv_chip_is_power9() and pnv_chip_is_power10() helpersGreg Kurz
They aren't used anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623842986.360005.1787401623906380181.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Pass content of the "compatible" property to pnv_dt_xscom()Greg Kurz
Since pnv_dt_xscom() is called from chip specific dt_populate() hooks, it shouldn't have to guess the chip type in order to populate the "compatible" property. Just pass the compat string and its size as arguments. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623842430.360005.9513965612524265862.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom()Greg Kurz
Since pnv_dt_xscom() is called from chip specific dt_populate() hooks, it shouldn't have to guess the chip type in order to populate the "reg" property. Just pass the base address and address size as arguments. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623841868.360005.17577624823547136435.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Introduce PnvChipClass::xscom_core_base() methodGreg Kurz
The pnv_chip_core_realize() function configures the XSCOM MMIO subregion for each core of a single chip. The base address of the subregion depends on the CPU type. Its computation is currently open-code using the pnv_chip_is_powerXX() helpers. This can be achieved with QOM. Introduce a method for this in the base chip class and implement it in child classes. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623841311.360005.4705705734873339545.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Introduce PnvChipClass::intc_print_info() methodGreg Kurz
The pnv_pic_print_info() callback checks the type of the chip in order to forward to the request appropriate interrupt controller. This can be achieved with QOM. Introduce a method for this in the base chip class and implement it in child classes. This also prepares ground for the upcoming interrupt controller of POWER10 chips. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623840755.360005.5002022339473369934.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpersGreg Kurz
They aren't used anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623840200.360005.1300941274565357363.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Introduce PnvMachineClass::dt_power_mgt()Greg Kurz
We add an extra node to advertise power management on some machines, namely powernv9 and powernv10. This is achieved by using the pnv_is_power9() and pnv_is_power10() helpers. This can be achieved with QOM. Add a method to the base class for powernv machines and have it implemented by machine types that support power management instead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623839642.360005.9243510140436689941.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compatGreg Kurz
The pnv_dt_create() function generates different contents for the "compatible" property of the root node in the DT, depending on the CPU type. This is open coded with multiple ifs using pnv_is_powerXX() helpers. It seems cleaner to achieve with QOM. Introduce a base class for the powernv machine and a compat attribute that each child class can use to provide the value for the "compatible" property. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623839085.360005.4046508784077843216.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> [dwg: Folded in small fix Greg spotted after posting] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Drop PnvPsiClass::chip_typeGreg Kurz
It isn't used anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623838530.360005.15470128760871845396.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Introduce PnvPsiClass::compatGreg Kurz
The Processor Service Interface (PSI) model has a chip_type class level attribute, which is used to generate the content of the "compatible" DT property according to the CPU type. Since the PSI model already has specialized classes for each supported CPU type, it seems cleaner to achieve this with QOM. Provide the content of the "compatible" property with a new class level attribute. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623837974.360005.14706607446188964477.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc: Drop useless extern annotation for functionsGreg Kurz
Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <157623837421.360005.412120366652768311.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Fix OCC common area region mappingCédric Le Goater
The OCC common area is mapped at a unique address on the system and each OCC is assigned a segment to expose its sensor data : ------------------------------------------------------------------------- | Start (Offset from | End | Size |Description | | BAR2 base address) | | | | ------------------------------------------------------------------------- | 0x00580000 | 0x005A57FF |150kB |OCC 0 Sensor Data Block| | 0x005A5800 | 0x005CAFFF |150kB |OCC 1 Sensor Data Block| | : | : | : | : | | 0x00686800 | 0x006ABFFF |150kB |OCC 7 Sensor Data Block| | 0x006AC000 | 0x006FFFFF |336kB |Reserved | ------------------------------------------------------------------------- Maximum size is 1.5MB. We could define a "OCC common area" memory region at the machine level and sub regions for each OCC. But it adds some extra complexity to the models. Fix the current layout with a simpler model. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191211082912.2625-3-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Introduce PBA registersCédric Le Goater
The PBA bridge unit (Power Bus Access) connects the OCC (On Chip Controller) to the Power bus and System Memory. The PBA is used to gather sensor data, for power management, for sleep states, for initial boot, among other things. The PBA logic provides a set of four registers PowerBus Access Base Address Registers (PBABAR0..3) which map the OCC address space to the PowerBus space. These registers are setup by the initial FW and define the PowerBus Range of system memory that can be accessed by PBA. The current modeling of the PBABAR registers is done under the common XSCOM handlers. We introduce a specific XSCOM regions for these registers and fix : - BAR sizes and BAR masks - The mapping of the OCC common area. It is common to all chips and should be mapped once. We will address per-OCC area in the next change. - OCC common area is in BAR 3 on P8 Inspired by previous work of Balamuruhan S <bala24@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191211082912.2625-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: Make PnvXScomInterface an incomplete typeGreg Kurz
PnvXScomInterface is an interface instance. It should never be dereferenced. Drop the dummy type definition for extra safety, which is the common practice with QOM interfaces. While here also convert the bogus OBJECT_CHECK() to INTERFACE_CHECK(). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157608025541.186670.1577861507610404326.stgit@bahia.lan> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17target/ppc: Work [S]PURR implementation and add HV supportSuraj Jitindar Singh
The Processor Utilisation of Resources Register (PURR) and Scaled Processor Utilisation of Resources Register (SPURR) provide an estimate of the resources used by the thread, present on POWER7 and later processors. Currently the [S]PURR registers simply count at the rate of the timebase. Preserve this behaviour but rework the implementation to store an offset like the timebase rather than doing the calculation manually. Also allow hypervisor write access to the register along with the currently available read access. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ clg: rebased on current ppc tree ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191128134700.16091-3-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17target/ppc: Implement the VTB for HV accessSuraj Jitindar Singh
The virtual timebase register (VTB) is a 64-bit register which increments at the same rate as the timebase register, present on POWER8 and later processors. The register is able to be read/written by the hypervisor and read by the supervisor. All other accesses are illegal. Currently the VTB is just an alias for the timebase (TB) register. Implement the VTB so that is can be read/written independent of the TB. Make use of the existing method for accessing timebase facilities where by the compensation is stored and used to compute the value on reads/is updated on writes. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> [ clg: rebased on current ppc tree ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191128134700.16091-2-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: add a LPC Controller model for POWER10Cédric Le Goater
Same a POWER9, only the MMIO window changes. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191205184454.10722-6-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17ppc/pnv: add a PSI bridge model for POWER10Cédric Le Goater
The POWER10 PSIHB controller is very similar to the one on POWER9. We should probably introduce a common PnvPsiXive object. The ESB page size should be changed to 64k when P10 support is ready. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191205184454.10722-5-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 00:44:45 +0000