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2021-05-01hw/block: m25p80: Add support for mt25ql02g and mt25qu02gCédric Le Goater
The Micron mt25ql02g is a 3V 2Gb serial NOR flash memory supporting dual I/O and quad I/O, 4KB, 32KB, 64KB sector erase. It also supports 4B opcodes. The mt25qu02g operates at 1.8V. https://4donline.ihs.com/images/VipMasterIC/IC/MICT/MICT-S-A0008500026/MICT-S-A0008511423-1.pdf?hkey=52A5661711E402568146F3353EA87419 Cc: Alistair Francis <alistair.francis@wdc.com> Cc: Francisco Iglesias <francisco.iglesias@xilinx.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-03-22hw/block: m25p80: Support fast read for SST flashesBin Meng
Per SST25VF016B datasheet [1], SST flash requires a dummy byte after the address bytes. Note only SPI mode is supported by SST flashes. [1] http://ww1.microchip.com/downloads/en/devicedoc/s71271_04.pdf Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210306060152.7250-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/block: m25p80: Add various ISSI flash informationBin Meng
This updates the flash information table to include various ISSI flashes that are supported by upstream U-Boot and Linux kernel. Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-3-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-04hw/block: m25p80: Add ISSI SPI flash supportBin Meng
This adds the ISSI SPI flash support. The number of dummy cycles in fast read, fast read dual output and fast read quad output commands is currently using the default 8. Likewise, the same default value is used for fast read dual/quad I/O command. Per the datasheet [1], the number of dummy cycles is configurable, but this is not modeled at present. For flash whose size is larger than 16 MiB, the sequence of 3-byte address along with EXTADD bit in the bank address register (BAR) is not supported. We assume that guest software always uses op codes with 4-byte address sequence. Fortunately, this is the case for both U-Boot and Linux spi-nor drivers. QPI (Quad Peripheral Interface) that supports 2-cycle instruction has different default values for dummy cycles of fast read family commands, and is unsupported at the time being. [1] http://www.issi.com/WW/pdf/25LP-WP256.pdf Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210126060007.12904-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-01-27block: Separate blk_is_writable() and blk_supports_write_perm()Kevin Wolf
Currently, blk_is_read_only() tells whether a given BlockBackend can only be used in read-only mode because its root node is read-only. Some callers actually try to answer a slightly different question: Is the BlockBackend configured to be writable, by taking write permissions on the root node? This can differ, for example, for CD-ROM devices which don't take write permissions, but may be backed by a writable image file. scsi-cd allows write requests to the drive if blk_is_read_only() returns false. However, the write request will immediately run into an assertion failure because the write permission is missing. This patch introduces separate functions for both questions. blk_supports_write_perm() answers the question whether the block node/image file can support writable devices, whereas blk_is_writable() tells whether the BlockBackend is currently configured to be writable. All calls of blk_is_read_only() are converted to one of the two new functions. Fixes: https://bugs.launchpad.net/bugs/1906693 Cc: qemu-stable@nongnu.org Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20210118123448.307825-2-kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2021-01-16hw/block: m25p80: Implement AAI-WP command support for SST flashesXuzhou Cheng
Auto Address Increment (AAI) Word-Program is a special command of SST flashes. AAI-WP allows multiple bytes of data to be programmed without re-issuing the next sequential address location. Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com> Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-id: 1608688825-81519-2-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-01-16hw/block: m25p80: Don't write to flash if write is disabledBin Meng
When write is disabled, the write to flash should be avoided in flash_write8(). Fixes: 82a2499011a7 ("m25p80: Initial implementation of SPI flash device") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-id: 1608688825-81519-1-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-12-18qdev: Move softmmu properties to qdev-properties-system.hEduardo Habkost
Move the property types and property macros implemented in qdev-properties-system.c to a new qdev-properties-system.h header. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-16-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-12-15hw/block/m25p80: Fix Numonyx fast read dummy cycle countJoe Komlodi
Numonyx chips determine the number of cycles to wait based on bits 7:4 in the volatile configuration register. However, if these bits are 0x0 or 0xF, the number of dummy cycles to wait is 10 for QIOR and QIOR4 commands or when in QIO mode, and otherwise 8 for the currently supported fast read commands. [1] [1] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_02g_cbb_0.pdf?rev=9b167fbf2b3645efba6385949a72e453 Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Message-id: 1605568264-26376-5-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15hw/block/m25p80: Check SPI mode before running some Numonyx commandsJoe Komlodi
Some Numonyx flash commands cannot be executed in DIO and QIO mode, such as trying to do DPP or DOR when in QIO mode. Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Message-id: 1605568264-26376-4-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15hw/block/m25p80: Fix when VCFG XIP bit is set for NumonyxJoe Komlodi
VCFG XIP is set (disabled) when the NVCFG XIP bits are all set (disabled). Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Message-id: 1605568264-26376-3-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15hw/block/m25p80: Make Numonyx config field names more accurateJoe Komlodi
The previous naming of the configuration registers made it sound like that if the bits were set the settings would be enabled, while the opposite is true. Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com> Message-id: 1605568264-26376-2-git-send-email-komlodi@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-10hw/ssi: Rename SSI 'slave' as 'peripheral'Philippe Mathieu-Daudé
In order to use inclusive terminology, rename SSI 'slave' as 'peripheral', following the specification resolution: https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names/ Patch created mechanically using: $ sed -i s/SSISlave/SSIPeripheral/ $(git grep -l SSISlave) $ sed -i s/SSI_SLAVE/SSI_PERIPHERAL/ $(git grep -l SSI_SLAVE) $ sed -i s/ssi-slave/ssi-peripheral/ $(git grep -l ssi-slave) $ sed -i s/ssi_slave/ssi_peripheral/ $(git grep -l ssi_slave) $ sed -i s/ssi_create_slave/ssi_create_peripheral/ \ $(git grep -l ssi_create_slave) Then in VMStateDescription vmstate_ssi_peripheral we restored the "SSISlave" migration stream name (to avoid breaking migration). Finally the following files have been manually tweaked: - hw/ssi/pl022.c - hw/ssi/xilinx_spips.c Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012124955.3409127-4-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-18Use OBJECT_DECLARE_TYPE when possibleEduardo Habkost
This converts existing DECLARE_OBJ_CHECKERS usage to OBJECT_DECLARE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost
Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-01hw: add a number of SPI-flash's of m25p80 familyIgor Kononenko
Support a following SPI flashes: * mx66l51235f * mt25ql512ab Signed-off-by: Igor Kononenko <i.kononenko@yadro.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200811203724.20699-1-i.kononenko@yadro.com> Message-Id: <20200819100956.2216690-22-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01m25p80: Add support for n25q512ax3Cédric Le Goater
Datasheet available here : https://www.micron.com/-/media/client/global/Documents/Products/Data%20Sheet/NOR%20Flash/Serial%20NOR/N25Q/n25q_512mb_1ce_3v_65nm.pdf Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20200819100956.2216690-4-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-09-01m25p80: Return the JEDEC ID twice for mx25l25635eCédric Le Goater
The mx25l25635e returns the JEDEC ID twice when issuing a RDID command : [ 2.512027] aspeed-smc 1e630000.spi: reading JEDEC ID C2:20:19:C2:20:19 This can break some firmware testing for this condition on the supermicrox11-bmc machine. Reported-by: Erik Smit <erik.lucas.smit@gmail.com> Message-Id: <20200819100956.2216690-2-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2020-03-17m25p80: Improve command handling for unsupported commandsGuenter Roeck
Whenever an unsupported command is encountered, the current code interprets each transferred byte as new command. Most of the time, those 'commands' are interpreted as new unknown commands. However, in rare cases, it may be that for example address or length information passed with the original command is by itself a valid command. If that happens, the state machine may get completely confused and, worst case, start writing data into the flash or even erase it. To avoid the problem, transition into STATE_READING_DATA and keep sending a value of 0 until the chip is deselected after encountering an unsupported command. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17m25p80: Improve command handling for Jedec commandsGuenter Roeck
When requesting JEDEC data using the JEDEC_READ command, the Linux kernel always requests 6 bytes. The current implementation only returns three bytes, and interprets the remaining three bytes as new commands. While this does not matter most of the time, it is at the very least confusing. To avoid the problem, always report up to 6 bytes of JEDEC data. Fill remaining data with 0. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-17m25p80: Convert to support tracingGuenter Roeck
While at it, add some trace messages to help debug problems seen when running the latest Linux kernel. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-01-24qdev: set properties with device_class_set_props()Marc-André Lureau
The following patch will need to handle properties registration during class_init time. Let's use a device_class_set_props() setter. spatch --macro-file scripts/cocci-macro-file.h --sp-file ./scripts/coccinelle/qdev-set-props.cocci --keep-comments --in-place --dir . @@ typedef DeviceClass; DeviceClass *d; expression val; @@ - d->props = val + device_class_set_props(d, val) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20200110153039.1379601-20-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-10-15m25p80: Add support for w25q512jvCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190925143248.10000-20-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-08-16Include hw/qdev-properties.h lessMarkus Armbruster
In my "build everything" tree, changing hw/qdev-properties.h triggers a recompile of some 2700 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). Many places including hw/qdev-properties.h (directly or via hw/qdev.h) actually need only hw/qdev-core.h. Include hw/qdev-core.h there instead. hw/qdev.h is actually pointless: all it does is include hw/qdev-core.h and hw/qdev-properties.h, which in turn includes hw/qdev-core.h. Replace the remaining uses of hw/qdev.h by hw/qdev-properties.h. While there, delete a few superfluous inclusions of hw/qdev-core.h. Touching hw/qdev-properties.h now recompiles some 1200 objects. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Daniel P. Berrangé" <berrange@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20190812052359.30071-22-armbru@redhat.com>
2019-08-16Include hw/hw.h exactly where neededMarkus Armbruster
In my "build everything" tree, changing hw/hw.h triggers a recompile of some 2600 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). The previous commits have left only the declaration of hw_error() in hw/hw.h. This permits dropping most of its inclusions. Touching it now recompiles less than 200 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-19-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-08-16Include migration/vmstate.h lessMarkus Armbruster
In my "build everything" tree, changing migration/vmstate.h triggers a recompile of some 2700 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). hw/hw.h supposedly includes it for convenience. Several other headers include it just to get VMStateDescription. The previous commit made that unnecessary. Include migration/vmstate.h only where it's still needed. Touching it now recompiles only some 1600 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-16-armbru@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-4-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c; ui/cocoa.m fixed up]
2018-07-02hw/block: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé
It eases code review, unit is explicit. Patch generated using: $ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/ and modified manually. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180625124238.25339-14-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-06-15m25p80: add support for two bytes WRSR for Macronix chipsCédric Le Goater
On Macronix chips, two bytes can written to the WRSR. First byte will configure the status register and the second the configuration register. It is important to save the configuration value as it contains the dummy cycle setting when using dual or quad IO mode. Signed-off-by: Cédric Le Goater <clg@kaod.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-01hw: Do not include "sysemu/blockdev.h" if it is not necessaryPhilippe Mathieu-Daudé
Remove those unneeded includes to speed up the compilation process a little bit. Code change produced with: $ git grep '#include "sysemu/blockdev.h"' | \ cut -d: -f-1 | \ xargs egrep -L "(BlockInterfaceType|DriveInfo|drive_get|blk_legacy_dinfo|blockdev_mark_auto_del)" | \ xargs sed -i.bak '/#include "sysemu\/blockdev.h"/d' Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180528232719.4721-15-f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-16maint: Fix macros with broken 'do/while(0); ' usageEric Blake
The point of writing a macro embedded in a 'do { ... } while (0)' loop (particularly if the macro has multiple statements or would otherwise end with an 'if' statement) is so that the macro can be used as a drop-in statement with the caller supplying the trailing ';'. Although our coding style frowns on brace-less 'if': if (cond) statement; else something else; that is the classic case where failure to use do/while(0) wrapping would cause the 'else' to pair with any embedded 'if' in the macro rather than the intended outer 'if'. But conversely, if the macro includes an embedded ';', then the same brace-less coding style would now have two statements, making the 'else' a syntax error rather than pairing with the outer 'if'. Thus, even though our coding style with required braces is not impacted, ending a macro with ';' makes our code harder to port to projects that use brace-less styles. The change should have no semantic impact. I was not able to fully compile-test all of the changes (as some of them are examples of the ugly bit-rotting debug print statements that are completely elided by default, and I didn't want to recompile with the necessary -D witnesses - cleaning those up is left as a bite-sized task for another day); I did, however, audit that for all files touched, all callers of the changed macros DID supply a trailing ';' at the callsite, and did not appear to be used as part of a brace-less conditional. Found mechanically via: $ git grep -B1 'while (0);' | grep -A1 \\\\ Signed-off-by: Eric Blake <eblake@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20171201232433.25193-7-eblake@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-13m25p80: Add support for n25q512a11 and n25q512a13Francisco Iglesias
Add support for Micron (Numonyx) n25q512a11 and n25q512a13 flashes. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Acked-by: Marcin Krzemiński <mar.krzeminski@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20171126231634.9531-5-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-12-13m25p80: Add support for BRRD/BRWR and BULK_ERASE (0x60)Francisco Iglesias
Add support for the bank address register access commands (BRRD/BRWR) and the BULK_ERASE (0x60) command. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Acked-by: Marcin Krzemiński <mar.krzeminski@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20171126231634.9531-4-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-12-13m25p80: Add support for SST READ ID 0x90/0xAB commandsFrancisco Iglesias
Add support for SST READ ID 0x90/0xAB commands for reading out the flash manufacturer ID and device ID. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20171126231634.9531-3-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-12-13m25p80: Add support for continuous read out of RDSR and READ_FSRFrancisco Iglesias
Add support for continuous read out of the RDSR and READ_FSR status registers until the chip select is deasserted. This feature is supported by amongst others 1 or more flashtypes manufactured by Numonyx (Micron), Windbond, SST, Gigadevice, Eon and Macronix. Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com> Acked-by: Marcin Krzemiński<mar.krzeminski@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20171126231634.9531-2-frasse.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-27migration: pre_save return intDr. David Alan Gilbert
Modify the pre_save method on VMStateDescription to return an int rather than void so that it potentially can fail. Changed zillions of devices to make them return 0; the only case I've made it return non-0 is hw/intc/s390_flic_kvm.c that already had an error_report/return case. Note: If you add an error exit in your pre_save you must emit an error_report to say why. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20170925112917.21340-2-dgilbert@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2017-02-28hw/block: Request permissionsKevin Wolf
This makes all device emulations with a qdev drive property request permissions on their BlockBackend. The only thing we block at this point is resizing images for some devices that can't support it. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Acked-by: Fam Zheng <famz@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com>
2017-01-24hw/block/m25p80: Fix typo in local macro nameStefan Weil
Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-01-20block: m25p80: Improve 1GiB Micron flash definitionMarcin Krzeminski
n25q00 and mt25q01 devices share the same JEDEC ID. The difference between those two devices is number of dies and one bit in extended JEDEC bytes. This commit adds proper entry for both devices by introduction the number of dies and and new 25q00 entries. Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20170108083854.5006-4-mar.krzeminski@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-20block: m25p80: Introduce die erase commandMarcin Krzeminski
Modern big flash NOR devices consist of more than one die. Some of them do not support chip erase and instead have a die erase command that can erase one die only. This commit adds support for defining the number of dies in the chip, and adds support for die erase command. The NOR flash model is not strict, so no option to disable chip erase has been added. Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20170108083854.5006-3-mar.krzeminski@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-20block: m25p80: Add Quad Page Program 4byteMarcin Krzeminski
Some flash chips have additional page program opcode that takes only 4 byte address. This commit adds support for such command in Qemu. Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20170108083854.5006-2-mar.krzeminski@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-09m25p80: don't let rogue SPI controllers cause buffer overrunsJean-Christophe Dubois
In normal operation we should never attempt to put more data into the data[] array than it can hold. However if the SPI controller connected to us misbehaves then it can send us a sequence of commands that attempt this. Since the controller might be in the guest (if the hardware does SPI via bit-banging), catch the possible overrun conditions and reset the flash internal state, logging them as guest errors. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 20170107111631.24444-1-jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: rewrote commit message to be more exact about when this can happen] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-12-27m25p80: add support for the mx66l1g45gCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1480434248-27138-3-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-06block: m25p80: Fix vmstate structure nameMarcin Krzeminski
Correct bad name of the vmstate structure. Since this breaks compatibility also update vmstate version back to 0 and make all fields independent of the VMState version. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1473146346-27337-1-git-send-email-marcin.krzeminski@nokia.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14m25p80: Fix QIOR/DIOR handling for WinbondMarcin Krzeminski
Winbond also support continuous read mode, but as an opposite for other flash type read mode clock cycles are included to dummy cycles number. This path add proper handling of read mode byte and update needed dummy cycles. QPI mode and dummy cycles configuration are not supported. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467809036-6986-1-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-07hw/block/m25p80: fix resource leakShannon Zhao
These two are spot by Coverity 1357232 and 1357233. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1467684998-12076-1-git-send-email-zhaoshenglong@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-04m25p80: qdev-ify drive propertyPaolo Bonzini
This allows specifying the property via -drive if=none and creating the flash device with -device. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467138270-32481-6-git-send-email-clg@kaod.org [clg: added an extra fix for sabrelite_init() keeping the test on flash_dev did not seem necessary. ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-04m25p80: change cur_addr to 32 bit integerPaolo Bonzini
The maximum amount of storage that can be addressed by the m25p80 command set is 4 GiB. However, cur_addr is currently a 64-bit integer. To avoid further problems related to sign extension of signed 32-bit integer expressions, change cur_addr to a 32 bit integer. Preserve migration format by adding a dummy 4-byte field in place of the (big-endian) high four bytes in the formerly 64-bit cur_addr field. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467138270-32481-5-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-04m25p80: avoid out of bounds accessesPaolo Bonzini
s->cur_addr can be made to point outside s->storage, either by writing a value >= 128 to s->ear (because s->ear * MAX_3BYTES_SIZE is a signed integer and sign-extends into the 64-bit cur_addr), or just by writing an address beyond the size of the flash being emulated. Avoid the sign extension to make the code cleaner, and on top of that mask s->cur_addr to s->size. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-id: 1467138270-32481-4-git-send-email-clg@kaod.org Reviewed by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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