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2019-03-22target/riscv: Zero extend the inputs of divuw and remuwPalmer Dabbelt
While running the GCC test suite against 4.0.0-rc0, Kito found a regression introduced by the decodetree conversion that caused divuw and remuw to sign-extend their inputs. The ISA manual says they are supposed to be zero extended: DIVW and DIVUW instructions are only valid for RV64, and divide the lower 32 bits of rs1 by the lower 32 bits of rs2, treating them as signed and unsigned integers respectively, placing the 32-bit quotient in rd, sign-extended to 64 bits. REMW and REMUW instructions are only valid for RV64, and provide the corresponding signed and unsigned remainder operations respectively. Both REMW and REMUW always sign-extend the 32-bit result to 64 bits, including on a divide by zero. Here's Kito's reduced test case from the GCC test suite unsigned calc_mp(unsigned mod) { unsigned a,b,c; c=-1; a=c/mod; b=0-a*mod; if (b > mod) { a += 1; b-=mod; } return b; } int main(int argc, char *argv[]) { unsigned x = 1234; unsigned y = calc_mp(x); if ((sizeof (y) == 4 && y != 680) || (sizeof (y) == 2 && y != 134)) abort (); exit (0); } I haven't done any other testing on this, but it does fix the test case. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19Update version for v4.0.0-rc0 releasePeter Maydell
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-19Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell
Block layer patches: - mirror: Fix early return from drain (could cause deadlocks) - vmdk: Fixed probing for version 3 images - vl: Fix to create migration object before block backends again (fixes segfault for block drivers that set migration blockers) - Several minor fixes, documentation and test case improvements # gpg: Signature made Tue 19 Mar 2019 14:59:17 GMT # gpg: using RSA key 7F09B272C88F2FD6 # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: qemu-iotests: Treat custom TEST_DIR in 051 blockdev: Check @replaces in blockdev_mirror_common block: Make bdrv_{copy_on_read,crypto_luks,replication} static blockjob: fix user pause in block_job_error_action qemu-iotests: Fix 232 for non-qcow2 vl: Fix to create migration object before block backends again iotests: 153: Wait for an answer to QMP commands block: Silence Coverity in bdrv_drop_intermediate() vmdk: Support version=3 in VMDK descriptor files qapi: fix block-latency-histogram-set description and examples qcow2: Fix data file error condition in qcow2_co_create() mirror: Confirm we're quiesced only if the job is paused or cancelled Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-19Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20190319' into ↵Peter Maydell
staging Xen queue Fix a bug on FreeBSD when doing a migration. # gpg: Signature made Tue 19 Mar 2019 15:40:55 GMT # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: issuer "anthony.perard@citrix.com" # gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [marginal] # gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * remotes/aperard/tags/pull-xen-20190319: xen-mapcache: use MAP_FIXED flag so the mmap address hint is always honored Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-19xen-mapcache: use MAP_FIXED flag so the mmap address hint is always honoredRoger Pau Monne
Or if it's not possible to honor the hinted address an error is returned instead. This makes it easier to spot the actual failure, instead of failing later on when the caller of xen_remap_bucket realizes the mapping has not been created at the requested address. Also note that at least on FreeBSD using MAP_FIXED will cause mmap to try harder to honor the passed address. Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Reviewed-by: Paul Durrant <paul.durrant@citrix.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Reviewed-by: Igor Druzhinin <igor.druzhinin@cirtix.com> Message-Id: <20190318173731.14494-1-roger.pau@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2019-03-19qemu-iotests: Treat custom TEST_DIR in 051Lukáš Doktor
When custom TEST_DIR is specified the output includes it without leading '/': $ TEST_DIR=/var/tmp ./check -file -qcow2 051 .... -drive0 (NODE_NAME): json:{"backing": {"driver": "qcow2", "file": {"driver": "file", "filename": "TEST_DIR/t.qcow2"}}, "driver": "qcow2", "file": {"driver": "file", "filename": SNAPSHOT_PATH}} (qcow2, read-only) +drive0 (NODE_NAME): json:{"backing": {"driver": "qcow2", "file": {"driver": "file", "filename": "TEST_DIR/t.qcow2"}}, "driver": "qcow2", "file": {"driver": "file", "filename": "TEST_DIR/vl.ziHfeP"}} (qcow2, read-only) Let's remove it from the sed regexp. Signed-off-by: Lukáš Doktor <ldoktor@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19blockdev: Check @replaces in blockdev_mirror_commonMax Reitz
There is no reason why the constraints we put on @replaces should be limited to drive-mirror. Therefore, move the sanity checks from qmp_drive_mirror() to blockdev_mirror_common() so they apply to blockdev-mirror as well. Signed-off-by: Max Reitz <mreitz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19block: Make bdrv_{copy_on_read,crypto_luks,replication} staticAlberto Garcia
Signed-off-by: Alberto Garcia <berto@igalia.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19blockjob: fix user pause in block_job_error_actionVladimir Sementsov-Ogievskiy
Job (especially mirror) may call block_job_error_action several times before actual pause if it has several in-flight requests. block_job_error_action will call job_pause more than once in this case, which lead to following block-job-resume qmp command can't actually resume the job. Fix it by do not increase pause level in block_job_error_action if user_paused already set. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19qemu-iotests: Fix 232 for non-qcow2Kevin Wolf
232 is marked as generic, but commit 12efe428c9e added code that assumes qcow2. What the new test really needs is backing files and support for updating the backing file link (.bdrv_change_backing_file). Split the non-generic code into a new test case 247 and make it work with qed, too. Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19vl: Fix to create migration object before block backends againMarkus Armbruster
Recent commit cda4aa9a5a0 moved block backend creation before machine property evaluation. This broke qemu-iotests 055. Turns out we need to create the migration object before block backends, so block backends can add migration blockers. Fix by calling migration_object_init() earlier, right before configure_blockdev(). Fixes: cda4aa9a5a08777cf13e164c0543bd4888b8adce Reported-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19iotests: 153: Wait for an answer to QMP commandsSergio Lopez
There are various actions in this test that must be executed sequentially, as the result of it depends on the state triggered by the previous one. If the last argument of _send_qemu_cmd() is an empty string, it just sends the QMP commands without waiting for an answer. While unlikely, it may happen that the next action in the test gets invoked before QEMU processes the QMP request. This issue seems to be easier to reproduce on servers with limited resources or highly loaded. With this change, we wait for an answer on all _send_qemu_cmd() calls. Signed-off-by: Sergio Lopez <slp@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19block: Silence Coverity in bdrv_drop_intermediate()Kevin Wolf
Coverity doesn't like that the return value of bdrv_check_update_perm() stays unused only in this place (CID 1399710). Even if checking local_err should be equivalent to checking ret < 0, let's switch to using the return value to be more consistent (and in case of a bug somewhere down the call chain, forgetting to assign errp is more likely than returning 0 for an error case). Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com>
2019-03-19vmdk: Support version=3 in VMDK descriptor filesSam Eiderman
Commit 509d39aa22909c0ed1aabf896865f19c81fb38a1 added support for read only VMDKs of version 3. This commit fixes the probe function to correctly handle descriptors of version 3. This commit has two effects: 1. We no longer need to supply '-f vmdk' when pointing to descriptor files of version 3 in qemu/qemu-img command line arguments. 2. This fixes the scenario where a VMDK points to a parent version 3 descriptor file which is being probed as "raw" instead of "vmdk". Reviewed-by: Arbel Moshe <arbel.moshe@oracle.com> Reviewed-by: Mark Kanda <mark.kanda@oracle.com> Signed-off-by: Shmuel Eiderman <shmuel.eiderman@oracle.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19qapi: fix block-latency-histogram-set description and examplesVladimir Sementsov-Ogievskiy
There no @device parameter, only the @id one. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19qcow2: Fix data file error condition in qcow2_co_create()Kevin Wolf
We were trying to check whether bdrv_open_blockdev_ref() returned success, but accidentally checked the wrong variable. Spotted by Coverity (CID 1399703). Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
2019-03-19mirror: Confirm we're quiesced only if the job is paused or cancelledSergio Lopez
While child_job_drained_begin() calls to job_pause(), the job doesn't actually transition between states until it runs again and reaches a pause point. This means bdrv_drained_begin() may return with some jobs using the node still having 'busy == true'. As a consequence, block_job_detach_aio_context() may get into a deadlock, waiting for the job to be actually paused, while the coroutine servicing the job is yielding and doesn't get the opportunity to get scheduled again. This situation can be reproduced by issuing a 'block-commit' immediately followed by a 'device_del'. To ensure bdrv_drained_begin() only returns when the jobs have been paused, we change mirror_drained_poll() to only confirm it's quiesced when job->paused == true and there aren't any in-flight requests, except if we reached that point by a drained section initiated by the mirror/commit job itself. The other block jobs shouldn't need any changes, as the default drained_poll() behavior is to only confirm it's quiesced if the job is not busy or completed. Signed-off-by: Sergio Lopez <slp@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2019-03-19Merge remote-tracking branch ↵Peter Maydell
'remotes/palmer/tags/riscv-for-master-4.0-rc0-2' into staging RISC-V Patches for 4.0-rc0, Part 2 This patch set contains three major sources of bug fixes: * Jim has added support for GDB XML files, as well as fixing access to CSRs via the GDB stub. * Alistair has rebased a large set of fixes from Michael that were still in his patch queue. These fix bugs all over our tree, including: * Logging of PMP errors. * User ABI cleanups and fixes, most notably on RVE guests. * Fixes for interrupt emulation fidelity. * Improvements to the emulation fidelity of the sifive_u machine. * Bin Meng has improved the emulation fidelity of the SiFive UART, which now supports both TX and RX interrupts (as well as setting the correct interrupt line). # gpg: Signature made Tue 19 Mar 2019 12:42:11 GMT # gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/palmer/tags/riscv-for-master-4.0-rc0-2: riscv: sifive_u: Correct UART0's IRQ in the device tree riscv: sifive_uart: Generate TX interrupt target/riscv: Remove unused struct riscv: sifive_u: Allow up to 4 CPUs to be created RISC-V: Update load reservation comment in do_interrupt RISC-V: Convert trap debugging to trace events RISC-V: Add support for vectored interrupts RISC-V: Change local interrupts from edge to level RISC-V: linux-user support for RVE ABI elf: Add RISC-V PSABI ELF header defines RISC-V: Remove unnecessary disassembler constraints RISC-V: Allow interrupt controllers to claim interrupts RISC-V: Replace __builtin_popcount with ctpop8 in PLIC riscv: pmp: Log pmp access errors as guest errors RISC-V: Add hooks to use the gdb xml files. RISC-V: Add debug support for accessing CSRs. RISC-V: Fixes to CSR_* register macros. RISC-V: Add 64-bit gdb xml files. RISC-V: Add 32-bit gdb xml files. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-19riscv: sifive_u: Correct UART0's IRQ in the device treeBin Meng
The UART0's interrupt vector is wrongly set to 1 in the device tree. Use SIFIVE_U_UART0_IRQ instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19riscv: sifive_uart: Generate TX interruptBin Meng
At present the sifive uart model only generates RX interrupt. This updates it to generate TX interrupt so that it is more useful. Note the TX fifo is still unimplemented. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19target/riscv: Remove unused structAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19riscv: sifive_u: Allow up to 4 CPUs to be createdAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Update load reservation comment in do_interruptMichael Clark
Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Convert trap debugging to trace eventsMichael Clark
Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Add support for vectored interruptsMichael Clark
If vectored interrupts are enabled (bits[1:0] of mtvec/stvec == 1) then use the following logic for trap entry address calculation: pc = mtvec + cause * 4 In addition to adding support for vectored interrupts this patch simplifies the interrupt delivery logic by making sync/async cause decoding and encoding steps distinct. The cause code and the sign bit indicating sync/async is split at the beginning of the function and fixed cause is renamed to cause. The MSB setting for async traps is delayed until setting mcause/scause to allow redundant variables to be eliminated. Some variables are renamed for conciseness and moved so that decls are at the start of the block. Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Change local interrupts from edge to levelMichael Clark
This effectively changes riscv_cpu_update_mip from edge to level. i.e. cpu_interrupt or cpu_reset_interrupt are called regardless of the current interrupt level. Fixes WFI doesn't return when a IPI is issued: - https://github.com/riscv/riscv-qemu/issues/132 To test: 1) Apply RISC-V Linux CPU hotplug patch: - http://lists.infradead.org/pipermail/linux-riscv/2018-May/000603.html 2) Enable CONFIG_CPU_HOTPLUG in linux .config 3) Try to offline and online cpus: echo 1 > /sys/devices/system/cpu/cpu2/online echo 0 > /sys/devices/system/cpu/cpu2/online echo 1 > /sys/devices/system/cpu/cpu2/online Reported-by: Atish Patra <atishp04@gmail.com> Cc: Atish Patra <atishp04@gmail.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: linux-user support for RVE ABIKito Cheng
This change checks elf_flags for EF_RISCV_RVE and if present uses the RVE linux syscall ABI which uses t0 for the syscall number instead of a7. Warn and exit if a non-RVE ABI binary is run on a cpu with the RVE extension as it is incompatible. Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Alistair Francis <Alistair.Francis@wdc.com> Co-authored-by: Kito Cheng <kito.cheng@gmail.com> Co-authored-by: Michael Clark <mjc@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19elf: Add RISC-V PSABI ELF header definesMichael Clark
Refer to the RISC-V PSABI specification for details: - https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md Cc: Michael Tokarev <mjt@tls.msk.ru> Cc: Richard Henderson <richard.henderson@linaro.org> Cc: Alistair Francis <Alistair.Francis@wdc.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Remove unnecessary disassembler constraintsMichael Clark
Remove machine generated constraints that are not referenced by the pseudo-instruction constraints. Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Allow interrupt controllers to claim interruptsMichael Clark
We can't allow the supervisor to control SEIP as this would allow the supervisor to clear a pending external interrupt which will result in lost a interrupt in the case a PLIC is attached. The SEIP bit must be hardware controlled when a PLIC is attached. This logic was previously hard-coded so SEIP was always masked even if no PLIC was attached. This patch adds riscv_cpu_claim_interrupts so that the PLIC can register control of SEIP. In the case of models without a PLIC (spike), the SEIP bit remains software controlled. This interface allows for hardware control of supervisor timer and software interrupts by other interrupt controller models. Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Replace __builtin_popcount with ctpop8 in PLICMichael Clark
The mode variable only uses the lower 4-bits (M,H,S,U) so replace the GCC specific __builtin_popcount with ctpop8. Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19riscv: pmp: Log pmp access errors as guest errorsAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Add hooks to use the gdb xml files.Jim Wilson
The gdb CSR xml file has registers in documentation order, not numerical order, so we need a table to map the register numbers. This also adds fairly standard gdb hooks to access xml specified registers. notice: The fpu xml from gdb 8.3 has unused register #, 65 and make first csr register # become 69. We register extra register on gdb to correct csr offset calculation Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Add debug support for accessing CSRs.Jim Wilson
Add a debugger field to CPURISCVState. Add riscv_csrrw_debug function to set it. Disable mode checks when debugger field true. Signed-off-by: Jim Wilson <jimw@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190212230903.9215-1-jimw@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Fixes to CSR_* register macros.Jim Wilson
This adds some missing CSR_* register macros, and documents some as being priv v1.9.1 specific. Signed-off-by: Jim Wilson <jimw@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190212230830.9160-1-jimw@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Add 64-bit gdb xml files.Jim Wilson
Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19RISC-V: Add 32-bit gdb xml files.Jim Wilson
Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-03-19Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20190319' ↵Peter Maydell
into staging ppc patch queue for 2019-03-19 This is a small set, it has a number of fixes and a couple of minor cleanups to go in for the hard freeze. # gpg: Signature made Tue 19 Mar 2019 10:05:48 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-4.0-20190319: spapr: Remove NULL checks on error_propagate() calls ppc/xics/spapr: Fix H_IPOLL implementation ppc/pnv: Fix variable size in pnv_psi_power9_irq_set() ppc/pnv: Use local_err variable in pnv_chip_power9_intc_create() MAINTAINERS: PPC: add a PowerNV machine entry ppc/pnv: update skiboot to commit 261ca8e779e5. spapr: Correctly set LPCR[GTSE] in H_REGISTER_PROCESS_TABLE Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-19Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2019-03-18-tag' ↵Peter Maydell
into staging qemu-ga patch queue for 4.0 * fix w32 build breakages with VSS enabled * fix PCI topology reporting for Windows * fix OS version reporting for Windows * add systemd info to qga schema documentation * add proper 'id' handling to QGA so it conforms to QMP spec # gpg: Signature made Mon 18 Mar 2019 16:20:32 GMT # gpg: using RSA key CEACC9E15534EBABB82D3FA03353C9CEF108B584 # gpg: issuer "mdroth@linux.vnet.ibm.com" # gpg: Good signature from "Michael Roth <flukshun@gmail.com>" [full] # gpg: aka "Michael Roth <mdroth@utexas.edu>" [full] # gpg: aka "Michael Roth <mdroth@linux.vnet.ibm.com>" [full] # Primary key fingerprint: CEAC C9E1 5534 EBAB B82D 3FA0 3353 C9CE F108 B584 * remotes/mdroth/tags/qga-pull-2019-03-18-tag: qmp: common 'id' handling & make QGA conform to QMP spec qga: process_event() simplification qga: Fix guest-get-fsinfo PCI address collection in Windows qga-win: fix VSS build breakage due to unintended gnu99 C++ flag qga-win: include glib when building VSS DLL qga-win: Adding support for Windows Server 2019 get-osinfo command qga: update docs with systemd suspend support info Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-03-19spapr: Remove NULL checks on error_propagate() callsMarkus Armbruster
Patch created mechanically by rerunning: $ spatch --sp-file scripts/coccinelle/error_propagate_null.cocci \ --macro-file scripts/cocci-macro-file.h \ --dir . --in-place Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190318190148.18283-1-armbru@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-19ppc/xics/spapr: Fix H_IPOLL implementationBenjamin Herrenschmidt
H_IPOLL takes the CPU# of the processor to poll as an argument, it doesn't operate on self. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190314063855.27890-1-clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-19ppc/pnv: Fix variable size in pnv_psi_power9_irq_set()Greg Kurz
PSI registers are 64-bit. Spotted by Coverity: CID 1399704 Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155248884690.893204.5428179144527749023.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-19ppc/pnv: Use local_err variable in pnv_chip_power9_intc_create()Greg Kurz
Detected by Coverity: CID 1399702 Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155248884129.893204.2293309859485638162.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-19MAINTAINERS: PPC: add a PowerNV machine entryCédric Le Goater
and declare David and myself as maintainers of the PPC PowerNV (Non-Virtualized) machine using the OPAL (skiboot) firmware. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20190313162423.22081-1-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-19ppc/pnv: update skiboot to commit 261ca8e779e5.Cédric Le Goater
It includes better support for POWER9 processor and the QEMU platform. DD1.0 workarounds have been removed which simplifies a bit the XIVE PowerNV model. Built from submodule. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190310175338.22266-1-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-19spapr: Correctly set LPCR[GTSE] in H_REGISTER_PROCESS_TABLEDavid Gibson
176dccee "target/ppc/spapr: Clear partition table entry when allocating hash table" reworked the H_REGISTER_PROCESS_TABLE hypercall, but unfortunately due to a small error no longer correctly sets the LPCR[GTSE] bit which allows the guest to directly execute (some types of) tlbie (TLB flush) instructions without involving the hypervisor. We got away with this, initially, because POWER9 did not have hypervisor mode enabled in its msr_mask, which meant we didn't actually run hypervisor privilege checks in TCG at all. However, da874d90 "target/ppc: add HV support for POWER9" turned on HV support on POWER9 for the benefit of the powernv machine type. This exposed the earlier bug in H_REGISTER_PROCESS_TABLE, and causes guests which rely on LPCR[GTSE] (i.e. basically all of them) to crash during early boot when their first tlbie instruction causes an unexpected trap. Fixes: 176dccee target/ppc/spapr: Clear partition table entry when allocating hash table Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Tested-by: Cleber Rosa <crosa@redhat.com>
2019-03-18qmp: common 'id' handling & make QGA conform to QMP specMarc-André Lureau
Let qmp_dispatch() copy the 'id' field. That way any qmp client will conform to the specification, including QGA. Furthermore, it simplifies the work for qemu monitor. CC: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2019-03-18qga: process_event() simplificationMarc-André Lureau
Simplify the code around qmp_dispatch(): - rely on qmp_dispatch/check_obj() for message checking - have a single send_response() point - constify send_response() argument It changes a couple of error messages: * When @req isn't a dictionary, from Invalid JSON syntax to QMP input must be a JSON object * When @req lacks member "execute", from this feature or command is not currently supported to QMP input lacks member 'execute' CC: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2019-03-18qga: Fix guest-get-fsinfo PCI address collection in WindowsMatt Hines
The Windows QEMU guest agent erroneously tries to collect PCI information directly from the physical drive. However, windows stores SCSI/IDE information with the drive and PCI information with the underlying storage controller This changes get_pci_info to use the physical drive's underlying storage controller to get PCI information. * Additionally Fixes incorrect size being passed to DeviceIoControl when getting volume extents. Can occasionally crash the guest agent Signed-off-by: Matt Hines <mhines@scalecomputing.com> *fix up some checkpatch warnings *fix domain reporting and add some sanity checks for debug Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2019-03-18scripts/make-release: Stop shipping u-boot source as a tarballPeter Maydell
In commit d0dead3b6df7f6cd970e we changed to shipping the u-boot sources as a tarball, to work around a problem where they contained a file and directory that had the same name except for case, which was preventing QEMU's source tarball being unpacked on case-insensitive filesystems. In commit f2a3b549e357041f86d7e we updated our u-boot blob and sources to v2019.01, which no longer has this problem, so we can finally remove our workaround (effectively reverting d0dead3b6df7f6cd970e). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Message-id: 20190314155628.8822-1-peter.maydell@linaro.org
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