qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer.

Age	Commit message (Expand)	Author
2021-06-08	io/net-listener: Call the notifier during finalize	Dr. David Alan Gilbert
2021-06-08	channel-socket: Only set CLOEXEC if we have space for fds	Dr. David Alan Gilbert
2021-06-08	migration/rdma: Fix cm event use after free	Li Zhijian
2021-06-08	yank: Unregister function when using TLS migration	Leonardo Bras
2021-06-08	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210...	Peter Maydell
2021-06-08	target/riscv: rvb: add b-ext version cpu option	Frank Chang
2021-06-08	target/riscv: rvb: support and turn on B-extension from command line	Kito Cheng
2021-06-08	target/riscv: rvb: add/shift with prefix zero-extend	Kito Cheng
2021-06-08	target/riscv: rvb: address calculation	Kito Cheng
2021-06-08	target/riscv: rvb: generalized or-combine	Frank Chang
2021-06-08	target/riscv: rvb: generalized reverse	Frank Chang
2021-06-08	target/riscv: rvb: rotate (left/right)	Kito Cheng
2021-06-08	target/riscv: rvb: shift ones	Kito Cheng
2021-06-08	target/riscv: rvb: single-bit instructions	Frank Chang
2021-06-08	target/riscv: add gen_shifti() and gen_shiftiw() helper functions	Frank Chang
2021-06-08	target/riscv: rvb: sign-extend instructions	Kito Cheng
2021-06-08	target/riscv: rvb: min/max instructions	Kito Cheng
2021-06-08	target/riscv: rvb: pack two words into one register	Kito Cheng
2021-06-08	target/riscv: rvb: logic-with-negate	Kito Cheng
2021-06-08	target/riscv: rvb: count bits set	Frank Chang
2021-06-08	target/riscv: rvb: count leading/trailing zeros	Kito Cheng
2021-06-08	target/riscv: reformat @sh format encoding for B-extension	Kito Cheng
2021-06-08	target/riscv: Pass the same value to oprsz and maxsz.	LIU Zhiwei
2021-06-08	target/riscv/pmp: Add assert for ePMP operations	Alistair Francis
2021-06-08	target/riscv: Dump CSR mscratch/sscratch/satp	Changbin Du
2021-06-08	target/riscv: Remove unnecessary riscv_*_names[] declaration	Bin Meng
2021-06-08	target/riscv: Do not include 'pmp.h' in user emulation	Philippe Mathieu-Daudé
2021-06-08	docs/system: Move the RISC-V -bios information to removed	Alistair Francis
2021-06-08	target/riscv: fix wfi exception behavior	Jose Martins
2021-06-08	hw/riscv: microchip_pfsoc: Support direct kernel boot	Bin Meng
2021-06-08	hw/riscv: Use macros for BIOS image names	Bin Meng
2021-06-08	docs/system/riscv: sifive_u: Document '-dtb' usage	Bin Meng
2021-06-08	docs/system/riscv: Correct the indentation level of supported devices	Bin Meng
2021-06-08	hw/riscv: Support the official PLIC DT bindings	Bin Meng
2021-06-08	hw/riscv: Support the official CLINT DT bindings	Bin Meng
2021-06-08	hw/riscv: virt: Switch to use qemu_fdt_setprop_string_array() helper	Bin Meng
2021-06-08	hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_array() helper	Bin Meng
2021-06-07	Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...	Peter Maydell
2021-06-07	Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-updates-07062...	Peter Maydell
2021-06-07	scripts/checkpatch.pl: process .c.inc and .h.inc files as C source	Matheus Ferst
2021-06-07	tests/vm: expose --source-path to scripts to find extra files	Alex Bennée
2021-06-07	gitlab-ci: Split gprof-gcov job	Philippe Mathieu-Daudé
2021-06-07	gitlab: work harder to avoid false positives in checkpatch	Alex Bennée
2021-06-07	tests/acceptance: tag various arm tests as TCG only	Alex Bennée
2021-06-07	tests/tcg/configure.sh: tweak quoting of target_compiler	Alex Bennée
2021-06-07	meson.build: fix cosmetics of compiler display	Alex Bennée
2021-06-07	tests/tcg: add a multiarch signals test to stress test signal delivery	Alex Bennée
2021-06-05	vhost-vdpa: Remove redundant declaration of address_space_memory	Xie Yongji
2021-06-05	scripts/oss-fuzz: Fix typo in documentation	Philippe Mathieu-Daudé
2021-06-05	target/mips: Fix 'Uncoditional' typo	Philippe Mathieu-Daudé