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2013-02-26Merge remote-tracking branch 'kwolf/for-anthony' into stagingAnthony Liguori
# By Paolo Bonzini (7) and others # Via Kevin Wolf * kwolf/for-anthony: (22 commits) pc: add compatibility machine types for 1.4 blockdev: enable discard by default qemu-nbd: add --discard option blockdev: add discard suboption to -drive block: implement BDRV_O_UNMAP block: complete all IOs before .bdrv_truncate coroutine: trim down nesting level in perf_nesting test coroutine: move pooling to common code qemu-iotests: Test qcow2 image creation options qemu-iotests: Add qemu-img compare test qemu-img: Add compare subcommand qemu-img: Add "Quiet mode" option block: Add synchronous wrapper for bdrv_co_is_allocated_above block: refuse negative iops and bps values block: use Error in do_check_io_limits() qcow2: support compressed clusters in BlockFragInfo qemu-img: add compressed clusters to BlockFragInfo qemu-img: fix missing space in qemu-img check output qcow2: record fragmentation statistics during check qcow2: introduce check_refcounts_l1/l2() flags ...
2013-02-26Merge remote-tracking branch 'quintela/stats.next' into stagingAnthony Liguori
# By Juan Quintela # Via Juan Quintela * quintela/stats.next: migration: calculate expected_downtime migration: don't account sleep time for calculating bandwidth migration: calculate end time after we have sent the data migration: change initial value of expected_downtime
2013-02-26Merge remote-tracking branch 'luiz/queue/qmp' into stagingAnthony Liguori
# By Markus Armbruster # Via Luiz Capitulino * luiz/queue/qmp: check-qjson: More thorough testing of UTF-8 in strings
2013-02-25target-ppc: Fix SUBFE carryRichard Henderson
While ~T0+T1+CF = T1-T0+CF-1 is true for the low 32-bits, it does not produce the correct carry-out to bit 33. Do exactly what the manual says. Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-25target-arm: Fix sbc_CC carryRichard Henderson
While T0+~T1+CF = T0-T1+CF-1 is true for the low 32-bits, it does not produce the correct carry-out to bit 33. Do exactly what the manual says. Using the ~T1 makes the add and subtract code paths nearly identical, so have sbc_CC use adc_CC. Cc: Peter Maydell <peter.maydell@linaro.org> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-25arm/translate.c: Fix adc_CC/sbc_CC implementationPeter Crosthwaite
commits 49b4c31efcce45ab714f286f14fa5d5173f9069d and 2de68a4900ef6eb67380b0c128abfe1976bc66e8 reworked the implementation of adc_CC and sub_CC. The new implementations (on the TCG_TARGET_HAS_add2_i32 code path) are incorrect. The new logic is: CF:NF = 0:A +/- 0:CF CF:NF = CF:A +/- 0:B The lower 32 bits of the intermediate result stored in NF needs to be passes into the second addition in place of A (s/CF:A/CF:NF): CF:NF = 0:A +/- 0:CF CF:NF = CF:NF +/- 0:B This patch fixes the issue. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-23target-mips: fix for sign-issue in MULQ_W helperPetar Jovanovic
Correct sign-propagation before multiplication in MULQ_W helper. The change also fixes previously incorrect expected values in the tests for MULQ_RS.W and MULQ_S.W. Signed-off-by: Petar Jovanovic <petarj@mips.com> Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-02-23target-mips: fix for incorrect multiplication with MULQ_S.PHPetar Jovanovic
The change corrects sign-related issue with MULQ_S.PH. It also includes extension to the already existing test which will trigger the issue. Signed-off-by: Petar Jovanovic <petarj@mips.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-02-23target-xtensa: Use add2/sub2 for macRichard Henderson
Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-xtensa: Use mul*2 for mul*hiRichard Henderson
Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-unicore32: Use mul*2 for do_multRichard Henderson
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-sh4: Use mul*2 for dmul*Richard Henderson
Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-sparc: Use mul*2 for multiplyRichard Henderson
Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-sparc: Use official add2/sub2 interfaces for addx/subxRichard Henderson
Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Compute mullwo without branchesRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Compute arithmetic shift carry without branchesRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Implement neg in terms of subfRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Use add2 for carry generationRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Compute addition carry with setcondRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Compute addition overflow without branchesRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Use setcond in gen_op_cmpRichard Henderson
Which means that callers need not copy data into local tmps. Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Split out SO, OV, CA fields from XERRichard Henderson
In preparation for more efficient setting of these fields. Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Use mul*2 in mulh* insnsRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-cris: Use mul*2 in mul* insnsRichard Henderson
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-mips: Use mul[us]2 in [D]MULT[U] insnsRichard Henderson
Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Implement sbc_cc inlineRichard Henderson
Use sub2 if available, otherwise use 64-bit arithmetic. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Implement adc_cc inlineRichard Henderson
Use add2 if available, otherwise use 64-bit arithmetic. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Use add2 in gen_add_CCRichard Henderson
Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Use mul[us]2 and add2 in umlal et alRichard Henderson
Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Use mul[us]2 in gen_mul[us]_i64_i32Richard Henderson
Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-s390x: Use mulu2 for mlgr insnRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-alpha: Use mulu2 for umulh insnRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Apply life analysis to 64-bit multiword arithmetic opsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Implement muls2 with mulu2Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-i386: Use add2 to implement the ADX extensionRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-arm: Implement muls2_i32Richard Henderson
We even had the encoding of smull already handy... Cc: Andrzej Zaborowski <balrogg@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-i386: Implement multiword arithmetic opsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Implement multiword addition helpersRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Implement multiword multiply helpersRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Implement a 64-bit to 32-bit extraction helperRichard Henderson
We're going to have use for this shortly in implementing other helpers. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Add signed multiword multiplication operationsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Add 64-bit multiword arithmetic operationsRichard Henderson
Matching the 32-bit multiword arithmetic that we already have. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-sparc: Always implement 32-bit multiword opsRichard Henderson
Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-i386: Always implement 32-bit multiword opsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Make 32-bit multiword operations optional for 64-bit hostsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23Merge branch 'eflags3' of git://github.com/rth7680/qemuBlue Swirl
* 'eflags3' of git://github.com/rth7680/qemu: (61 commits) target-i386: Use movcond to implement shiftd. target-i386: Discard CC_OP computation in set_cc_op also target-i386: Use movcond to implement rotate flags. target-i386: Use movcond to implement shift flags. target-i386: Add CC_OP_CLR target-i386: Implement tzcnt and fix lzcnt target-i386: Use clz/ctz for bsf/bsr helpers target-i386: Implement ADX extension target-i386: Implement RORX target-i386: Implement SHLX, SARX, SHRX target-i386: Implement PDEP, PEXT target-i386: Implement MULX target-i386: Implement BZHI target-i386: Implement BLSR, BLSMSK, BLSI target-i386: Implement BEXTR target-i386: Implement ANDN target-i386: Implement MOVBE target-i386: Decode the VEX prefixes target-i386: Tidy prefix parsing target-i386: Use CC_SRC2 for ADC and SBB ...
2013-02-23Replace all setjmp()/longjmp() with sigsetjmp()/siglongjmp()Peter Maydell
The setjmp() function doesn't specify whether signal masks are saved and restored; on Linux they are not, but on BSD (including MacOSX) they are. We want to have consistent behaviour across platforms, so we should always use "don't save/restore signal mask" (this is also generally going to be faster). This also works around a bug in MacOSX where the signal-restoration on longjmp() affects the signal mask for a completely different thread, not just the mask for the thread which did the longjmp. The most visible effect of this was that ctrl-C was ignored on MacOSX because the CPU thread did a longjmp which resulted in its signal mask being applied to every thread, so that all threads had SIGINT and SIGTERM blocked. The POSIX-sanctioned portable way to do a jump without affecting signal masks is to siglongjmp() to a sigjmp_buf which was created by calling sigsetjmp() with a zero savemask parameter, so change all uses of setjmp()/longjmp() accordingly. [Technically POSIX allows sigsetjmp(buf, 0) to save the signal mask; however the following siglongjmp() must not restore the signal mask, so the pair can be effectively considered as "sigjmp/longjmp which don't touch the mask".] For Windows we provide a trivial sigsetjmp/siglongjmp in terms of setjmp/longjmp -- this is OK because no user will ever pass a non-zero savemask. The setjmp() uses in tests/tcg/test-i386.c and tests/tcg/linux-test.c are left untouched because these are self-contained singlethreaded test programs intended to be run under QEMU's Linux emulation, so they have neither the portability nor the multithreading issues to deal with. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Tested-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23SPARC LEON power-down support addedRonald Hecht
Signed-off-by: Ronald Hecht <address@hidden> Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23Added LEON MMU ASI mappings and corrected LEON3 MMU masks.Ronald Hecht
This patch adds SPARC ASI mappings that are used by the LEON processor.It also corrects the MMU context register and context table pointer mask of the LEON3. Signed-off-by: Ronald Hecht <ronald.hecht@gmx.de> Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23grlib-apbuart: Add support of various flagsRonald Hecht
- enable/disable Rx and Tx - Rx and Tx interrupt - Tx FIFO empty and Tx SHIFT empty Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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