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2020-03-12docs: add Orange Pi PC documentNiek Linnenbank
The Xunlong Orange Pi PC machine is a functional ARM machine based on the Allwinner H3 System-on-Chip. It supports mainline Linux, U-Boot, NetBSD and is covered by acceptance tests. This commit adds a documentation text file with a description of the machine and instructions for the user. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-19-nieklinnenbank@gmail.com [PMM: moved file into docs/system/arm to match the reorg of the arm target part of the docs; tweaked heading to match other boards] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12tests/boot_linux_console: Test booting NetBSD via U-Boot on OrangePi PCPhilippe Mathieu-Daudé
This test boots U-Boot then NetBSD (stored on a SD card) on a OrangePi PC board. As it requires ~1.3GB of storage, it is disabled by default. U-Boot is built by the Debian project [1], and the SD card image is provided by the NetBSD organization [2]. Once the compressed SD card image is downloaded (304MB) and extracted, this test is fast: $ AVOCADO_ALLOW_LARGE_STORAGE=yes \ avocado --show=app,console run -t machine:orangepi-pc \ tests/acceptance/boot_linux_console.py console: U-Boot SPL 2020.01+dfsg-1 (Jan 08 2020 - 08:19:44 +0000) console: DRAM: 1024 MiB console: U-Boot 2020.01+dfsg-1 (Jan 08 2020 - 08:19:44 +0000) Allwinner Technology console: CPU: Allwinner H3 (SUN8I 0000) console: scanning bus usb@1c1b000 for devices... 1 USB Device(s) found console: scanning bus usb@1c1d000 for devices... 1 USB Device(s) found console: scanning usb for storage devices... 0 Storage Device(s) found console: Hit any key to stop autoboot: 0 console: => setenv bootargs root=ld0a console: => setenv kernel netbsd-GENERIC.ub console: => setenv fdtfile dtb/sun8i-h3-orangepi-pc.dtb console: => boot console: ## Booting kernel from Legacy Image at 42000000 ... console: Image Name: NetBSD/earmv7hf 9.0_RC1 console: Image Type: ARM Linux Kernel Image (no loading done) (uncompressed) console: XIP Kernel Image (no loading done) console: Loading Device Tree to 49ff6000, end 49fffe01 ... OK console: Starting kernel ... console: [ 1.0000000] NetBSD/evbarm (fdt) booting ... console: [ 1.0000000] NetBSD 9.0 (GENERIC) #0: Fri Feb 14 00:06:28 UTC 2020 console: [ 1.0000000] mkrepro@mkrepro.NetBSD.org:/usr/src/sys/arch/evbarm/compile/GENERIC console: [ 1.0000000] total memory = 1024 MB console: [ 1.0000000] avail memory = 1003 MB console: [ 1.0000000] armfdt0 (root) console: [ 1.0000000] simplebus0 at armfdt0: Xunlong Orange Pi PC console: [ 1.0000000] cpu0 at cpus0: Cortex-A7 r0p5 (Cortex V7A core) console: [ 1.0000000] cpu0: DC enabled IC enabled WB enabled LABT branch prediction enabled console: [ 1.0000000] cpu0: 32KB/64B 2-way L1 VIPT Instruction cache console: [ 1.0000000] cpu0: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache console: [ 1.0000000] cpu0: 2304KB/64B 16-way write-through L2 PIPT Unified cache console: [ 1.0000000] vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals ... console: [ 2.3812082] sdmmc0: SD card status: 4-bit, C0 console: [ 2.3812082] ld0 at sdmmc0: <0xaa:0x5859:QEMU!:0x01:0xdeadbeef:0x062> console: [ 2.4012856] ld0: 1226 MB, 622 cyl, 64 head, 63 sec, 512 bytes/sect x 2511872 sectors console: [ 2.5321222] ld0: 4-bit width, High-Speed/SDR25, 50.000 MHz console: [ 3.1068718] WARNING: 4 errors while detecting hardware; check system log. console: [ 3.1179868] boot device: ld0 console: [ 3.1470623] root on ld0a dumps on ld0b console: [ 3.2464436] root file system type: ffs console: [ 3.2897123] kern.module.path=/stand/evbarm/9.0/modules console: Mon Feb 17 20:33:35 UTC 2020 console: Starting root file system check: PASS (35.96 s) RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0 JOB TIME : 36.09 s Note, this test only took ~65 seconds to run on Travis-CI, see: [3]. This test is based on a description from Niek Linnenbank from [4]. [1] https://wiki.debian.org/InstallingDebianOn/Allwinner#Creating_a_bootable_SD_Card_with_u-boot [2] https://wiki.netbsd.org/ports/evbarm/allwinner/ [3] https://travis-ci.org/philmd/qemu/jobs/638823612#L3778 [4] https://www.mail-archive.com/qemu-devel@nongnu.org/msg669347.html Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-18-nieklinnenbank@gmail.com [NL: changed test to use NetBSD 9.0 final release and -global allwinner-rtc.base-year] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12tests/boot_linux_console: Add a SLOW test booting Ubuntu on OrangePi PCPhilippe Mathieu-Daudé
This test boots Ubuntu Bionic on a OrangePi PC board. As it requires 1GB of storage, and is slow, this test is disabled on automatic CI testing. It is useful for workstation testing. Currently Avocado timeouts too quickly, so we can't run userland commands. The kernel image and DeviceTree blob are built by the Armbian project (based on Debian): https://www.armbian.com/orange-pi-pc/ The Ubuntu image is downloaded from: https://dl.armbian.com/orangepipc/Bionic_current This test can be run using: $ AVOCADO_ALLOW_LARGE_STORAGE=yes \ avocado --show=app,console run -t machine:orangepi-pc \ tests/acceptance/boot_linux_console.py console: U-Boot SPL 2019.04-armbian (Nov 18 2019 - 23:08:35 +0100) console: DRAM: 1024 MiB console: Failed to set core voltage! Can't set CPU frequency console: Trying to boot from MMC1 console: U-Boot 2019.04-armbian (Nov 18 2019 - 23:08:35 +0100) Allwinner Technology console: CPU: Allwinner H3 (SUN8I 0000) console: Model: Xunlong Orange Pi PC console: DRAM: 1 GiB console: MMC: mmc@1c0f000: 0 [...] console: Uncompressing Linux... done, booting the kernel. console: Booting Linux on physical CPU 0x0 console: Linux version 5.3.9-sunxi (root@builder) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #19.11.3 SMP Mon Nov 18 18:49:43 CET 2019 console: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=50c5387d console: CPU: div instructions available: patching division code console: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache console: OF: fdt: Machine model: Xunlong Orange Pi PC [...] console: EXT4-fs (mmcblk0p1): mounted filesystem with writeback data mode. Opts: (null) console: done. console: Begin: Running /scripts/local-bottom ... done. console: Begin: Running /scripts/init-bottom ... done. console: systemd[1]: systemd 237 running in system mode. (...) console: systemd[1]: Detected architecture arm. console: Welcome to Ubuntu 18.04.3 LTS! console: systemd[1]: Set hostname to <orangepipc>. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-17-nieklinnenbank@gmail.com [NL: rename in commit message Raspbian to Armbian, remove vm.set_machine()] [NL: changed test to boot from SD card via BootROM, added check for 7z] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12tests/boot_linux_console: Add a SD card test for the OrangePi PC boardPhilippe Mathieu-Daudé
The kernel image and DeviceTree blob are built by the Armbian project (based on Debian): https://www.armbian.com/orange-pi-pc/ The SD image is from the kernelci.org project: https://kernelci.org/faq/#the-code If ARM is a target being built, "make check-acceptance" will automatically include this test by the use of the "arch:arm" tags. Alternatively, this test can be run using: $ avocado --show=console run -t machine:orangepi-pc tests/acceptance/boot_linux_console.py console: Uncompressing Linux... done, booting the kernel. console: Booting Linux on physical CPU 0x0 console: Linux version 4.20.7-sunxi (root@armbian.com) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #5.75 SMP Fri Feb 8 09:02:10 CET 2019 console: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=50c5387d [...] console: sunxi-wdt 1c20ca0.watchdog: Watchdog enabled (timeout=16 sec, nowayout=0) console: sunxi-mmc 1c0f000.mmc: Linked as a consumer to regulator.2 console: sunxi-mmc 1c0f000.mmc: Got CD GPIO console: ledtrig-cpu: registered to indicate activity on CPUs console: hidraw: raw HID events driver (C) Jiri Kosina console: usbcore: registered new interface driver usbhid console: usbhid: USB HID core driver console: Initializing XFRM netlink socket console: sunxi-mmc 1c0f000.mmc: initialized, max. request size: 16384 KB console: NET: Registered protocol family 10 console: mmc0: host does not support reading read-only switch, assuming write-enable console: mmc0: Problem switching card into high-speed mode! console: mmc0: new SD card at address 4567 console: mmcblk0: mmc0:4567 QEMU! 60.0 MiB [...] console: EXT4-fs (mmcblk0): mounting ext2 file system using the ext4 subsystem console: EXT4-fs (mmcblk0): mounted filesystem without journal. Opts: (null) console: VFS: Mounted root (ext2 filesystem) on device 179:0. console: Run /sbin/init as init process console: EXT4-fs (mmcblk0): re-mounted. Opts: block_validity,barrier,user_xattr,acl console: Starting syslogd: OK console: Starting klogd: OK console: Populating /dev using udev: udevd[203]: starting version 3.2.7 console: /bin/sh: can't access tty; job control turned off console: cat /proc/partitions console: / # cat /proc/partitions console: major minor #blocks name console: 1 0 4096 ram0 console: 1 1 4096 ram1 console: 1 2 4096 ram2 console: 1 3 4096 ram3 console: 179 0 61440 mmcblk0 console: reboot console: / # reboot console: umount: devtmpfs busy - remounted read-only console: EXT4-fs (mmcblk0): re-mounted. Opts: (null) console: The system is going down NOW! console: Sent SIGTERM to all processes console: Sent SIGKILL to all processes console: Requesting system reboot console: reboot: Restarting system JOB TIME : 68.64 s Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-16-nieklinnenbank@gmail.com [NL: rename in commit message Raspbian to Armbian, remove vm.set_machine()] [NL: extend test with ethernet device checks] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12tests/boot_linux_console: Add initrd test for the Orange Pi PC boardPhilippe Mathieu-Daudé
This test boots a Linux kernel on a OrangePi PC board and verify the serial output is working. The kernel image and DeviceTree blob are built by the Armbian project (based on Debian): https://www.armbian.com/orange-pi-pc/ The cpio image used comes from the linux-build-test project: https://github.com/groeck/linux-build-test If ARM is a target being built, "make check-acceptance" will automatically include this test by the use of the "arch:arm" tags. Alternatively, this test can be run using: $ avocado --show=console run -t machine:orangepi-pc tests/acceptance/boot_linux_console.py console: Uncompressing Linux... done, booting the kernel. console: Booting Linux on physical CPU 0x0 console: Linux version 4.20.7-sunxi (root@armbian.com) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #5.75 SMP Fri Feb 8 09:02:10 CET 2019 console: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=50c5387d console: CPU: div instructions available: patching division code console: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache console: OF: fdt: Machine model: Xunlong Orange Pi PC [...] console: Trying to unpack rootfs image as initramfs... console: Freeing initrd memory: 3256K console: Freeing unused kernel memory: 1024K console: Run /init as init process console: mount: mounting devtmpfs on /dev failed: Device or resource busy console: Starting logging: OK console: Initializing random number generator... random: dd: uninitialized urandom read (512 bytes read) console: done. console: Starting network: OK console: Found console ttyS0 console: Linux version 4.20.7-sunxi (root@armbian.com) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #5.75 SMP Fri Feb 8 09:02:10 CET 2019 console: Boot successful. console: cat /proc/cpuinfo console: / # cat /proc/cpuinfo console: processor : 0 console: model name : ARMv7 Processor rev 5 (v7l) console: BogoMIPS : 125.00 console: Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm console: CPU implementer : 0x41 console: CPU architecture: 7 console: CPU variant : 0x0 console: CPU part : 0xc07 console: CPU revision : 5 [...] console: processor : 3 console: model name : ARMv7 Processor rev 5 (v7l) console: BogoMIPS : 125.00 console: Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm console: CPU implementer : 0x41 console: CPU architecture: 7 console: CPU variant : 0x0 console: CPU part : 0xc07 console: CPU revision : 5 console: Hardware : Allwinner sun8i Family console: Revision : 0000 console: Serial : 0000000000000000 console: cat /proc/iomem console: / # cat /proc/iomem console: 01000000-010fffff : clock@1000000 console: 01c00000-01c00fff : system-control@1c00000 console: 01c02000-01c02fff : dma-controller@1c02000 [...] console: reboot console: / # reboot console: / # Found console ttyS0 console: Stopping network: OK console: hrtimer: interrupt took 21852064 ns console: Saving random seed... random: dd: uninitialized urandom read (512 bytes read) console: done. console: Stopping logging: OK console: umount: devtmpfs busy - remounted read-only console: umount: can't unmount /: Invalid argument console: The system is going down NOW! console: Sent SIGTERM to all processes console: Sent SIGKILL to all processes console: Requesting system reboot console: reboot: Restarting system PASS (48.32 s) JOB TIME : 49.16 s Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-15-nieklinnenbank@gmail.com [NL: rename in commit message Raspbian to Armbian, remove vm.set_machine()] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12tests/boot_linux_console: Add a quick test for the OrangePi PC boardPhilippe Mathieu-Daudé
This test boots a Linux kernel on a OrangePi PC board and verify the serial output is working. The kernel image and DeviceTree blob are built by the Armbian project (based on Debian): https://www.armbian.com/orange-pi-pc/ If ARM is a target being built, "make check-acceptance" will automatically include this test by the use of the "arch:arm" tags. Alternatively, this test can be run using: $ make check-venv $ ./tests/venv/bin/avocado --show=console,app run -t machine:orangepi-pc tests/acceptance/boot_linux_console.py JOB ID : 2e4d15eceb13c33672af406f08171e6e9de1414a JOB LOG : ~/job-results/job-2019-12-17T05.46-2e4d15e/job.log (1/1) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_orangepi: console: Uncompressing Linux... done, booting the kernel. console: Booting Linux on physical CPU 0x0 console: Linux version 4.20.7-sunxi (root@armbian.com) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #5.75 SMP Fri Feb 8 09:02:10 CET 2019 console: CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=50c5387d console: CPU: div instructions available: patching division code console: CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache console: OF: fdt: Machine model: Xunlong Orange Pi PC console: Memory policy: Data cache writealloc console: OF: reserved mem: failed to allocate memory for node 'cma@4a000000' console: cma: Failed to reserve 128 MiB console: psci: probing for conduit method from DT. console: psci: PSCIv0.2 detected in firmware. console: psci: Using standard PSCI v0.2 function IDs console: psci: Trusted OS migration not required console: random: get_random_bytes called from start_kernel+0x8d/0x3c2 with crng_init=0 console: percpu: Embedded 18 pages/cpu @(ptrval) s41228 r8192 d24308 u73728 console: Built 1 zonelists, mobility grouping on. Total pages: 32480 console: Kernel command line: printk.time=0 console=ttyS0,115200 PASS (8.59 s) JOB TIME : 8.81 s Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-14-nieklinnenbank@gmail.com [NL: rename in commit message Raspbian to Armbian, remove vm.set_machine()] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner: add RTC device supportNiek Linnenbank
Allwinner System-on-Chips usually contain a Real Time Clock (RTC) for non-volatile system date and time keeping. This commit adds a generic Allwinner RTC device that supports the RTC devices found in Allwinner SoC family sun4i (A10), sun7i (A20) and sun6i and newer (A31, H2+, H3, etc). The following RTC functionality and features are implemented: * Year-Month-Day read/write * Hour-Minute-Second read/write * General Purpose storage The following boards are extended with the RTC device: * Cubieboard (hw/arm/cubieboard.c) * Orange Pi PC (hw/arm/orangepi.c) Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-13-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner-h3: add SDRAM controller deviceNiek Linnenbank
In the Allwinner H3 SoC the SDRAM controller is responsible for interfacing with the external Synchronous Dynamic Random Access Memory (SDRAM). Types of memory that the SDRAM controller supports are DDR2/DDR3 and capacities of up to 2GiB. This commit adds emulation support of the Allwinner H3 SDRAM controller. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-12-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner-h3: add Boot ROM supportNiek Linnenbank
A real Allwinner H3 SoC contains a Boot ROM which is the first code that runs right after the SoC is powered on. The Boot ROM is responsible for loading user code (e.g. a bootloader) from any of the supported external devices and writing the downloaded code to internal SRAM. After loading the SoC begins executing the code written to SRAM. This commits adds emulation of the Boot ROM firmware setup functionality by loading user code from SD card in the A1 SRAM. While the A1 SRAM is 64KiB, we limit the size to 32KiB because the real H3 Boot ROM also rejects sizes larger than 32KiB. For reference, this behaviour is documented by the Linux Sunxi project wiki at: https://linux-sunxi.org/BROM#U-Boot_SPL_limitations Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-11-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner-h3: add EMAC ethernet deviceNiek Linnenbank
The Allwinner Sun8i System on Chip family includes an Ethernet MAC (EMAC) which provides 10M/100M/1000M Ethernet connectivity. This commit adds support for the Allwinner EMAC from the Sun8i family (H2+, H3, A33, etc), including emulation for the following functionality: * DMA transfers * MII interface * Transmit CRC calculation Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-10-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner: add SD/MMC host controllerNiek Linnenbank
The Allwinner System on Chip families sun4i and above contain an integrated storage controller for Secure Digital (SD) and Multi Media Card (MMC) interfaces. This commit adds support for the Allwinner SD/MMC storage controller with the following emulated features: * DMA transfers * Direct FIFO I/O * Short/Long format command responses * Auto-Stop command (CMD12) * Insert & remove card detection The following boards are extended with the SD host controller: * Cubieboard (hw/arm/cubieboard.c) * Orange Pi PC (hw/arm/orangepi.c) Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-9-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner: add Security Identifier deviceNiek Linnenbank
The Security Identifier device found in various Allwinner System on Chip designs gives applications a per-board unique identifier. This commit adds support for the Allwinner Security Identifier using a 128-bit UUID value as input. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-8-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner: add CPU Configuration moduleNiek Linnenbank
Various Allwinner System on Chip designs contain multiple processors that can be configured and reset using the generic CPU Configuration module interface. This commit adds support for the Allwinner CPU configuration interface which emulates the following features: * CPU reset * CPU status Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-7-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner-h3: add System Control moduleNiek Linnenbank
The Allwinner H3 System on Chip has an System Control module that provides system wide generic controls and device information. This commit adds support for the Allwinner H3 System Control module. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-6-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner-h3: add USB host controllerNiek Linnenbank
The Allwinner H3 System on Chip contains multiple USB 2.0 bus connections which provide software access using the Enhanced Host Controller Interface (EHCI) and Open Host Controller Interface (OHCI) interfaces. This commit adds support for both interfaces in the Allwinner H3 System on Chip. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-5-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/allwinner-h3: add Clock Control UnitNiek Linnenbank
The Clock Control Unit is responsible for clock signal generation, configuration and distribution in the Allwinner H3 System on Chip. This commit adds support for the Clock Control Unit which emulates a simple read/write register interface. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-4-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm: add Xunlong Orange Pi PC machineNiek Linnenbank
The Xunlong Orange Pi PC is an Allwinner H3 System on Chip based embedded computer with mainline support in both U-Boot and Linux. The board comes with a Quad Core Cortex A7 @ 1.3GHz, 1GiB RAM, 100Mbit ethernet, USB, SD/MMC, USB, HDMI and various other I/O. This commit add support for the Xunlong Orange Pi PC machine. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Tested-by: KONRAD Frederic <frederic.konrad@adacore.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20200311221854.30370-3-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm: add Allwinner H3 System-on-ChipNiek Linnenbank
The Allwinner H3 is a System on Chip containing four ARM Cortex A7 processor cores. Features and specifications include DDR2/DDR3 memory, SD/MMC storage cards, 10/100/1000Mbit Ethernet, USB 2.0, HDMI and various I/O modules. This commit adds support for the Allwinner H3 System on Chip. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200311221854.30370-2-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/fsl-imx25: Wire up USB controllersGuenter Roeck
i.MX25 supports two USB controllers. Let's wire them up. With this patch, imx25-pdk can boot from both USB ports. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200310215146.19688-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/fsl-imx25: Wire up eSDHC controllersGuenter Roeck
Wire up eSDHC controllers in fsl-imx25. For imx25-pdk, connect drives provided on the command line to available eSDHC controllers. This patch enables booting the imx25-pdk emulation from SD card. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200310215146.19688-2-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: made commit subject consistent with other patch] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12hw/arm/cubieboard: make sure SOC object isn't leakedIgor Mammedov
SOC object returned by object_new() is leaked in current code. Set SOC parent explicitly to board and then unref to SOC object to make sure that refererence returned by object_new() is taken care of. The SOC object will be kept alive by its parent (machine) and will be automatically freed when MachineState is destroyed. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reported-by: Andrew Jones <drjones@redhat.com> Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20200303091254.22373-1-imammedo@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12target/arm: Disable clean_data_tbi for system modeRichard Henderson
We must include the tag in the FAR_ELx register when raising an addressing exception. Which means that we should not clear out the tag during translation. We cannot at present comply with this for user mode, so we retain the clean_data_tbi function for the moment, though it no longer does what it says on the tin for system mode. This function is to be replaced with MTE, so don't worry about the slight misnaming. Buglink: https://bugs.launchpad.net/qemu/+bug/1867072 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200308012946.16303-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12target/arm: Check addresses for disabled regimesRichard Henderson
We fail to validate the upper bits of a virtual address on a translation disabled regime, as per AArch64.TranslateAddressS1Off. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200308012946.16303-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12aspeed/smc: Fix User mode select/unselect schemeCédric Le Goater
The Aspeed SMC Controller can operate in different modes : Read, Fast Read, Write and User modes. When the User mode is configured, it selects automatically the SPI slave device until the CE_STOP_ACTIVE bit is set to 1. When any other modes are configured the device is unselected. The HW logic handles the chip select automatically when the flash is accessed through its AHB window. When configuring the CEx Control Register, the User mode logic to select and unselect the slave is incorrect and data corruption can be seen on machines using two chips, witherspoon and romulus. Rework the handler setting the CEx Control Register to fix this issue. Fixes: 7c1c69bca43c ("ast2400: add SMC controllers (FMC and SPI)") Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20200206112645.21275-3-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12aspeed/smc: Add some tracingCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200206112645.21275-2-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12target/arm: Fix some comment typosPeter Maydell
Fix a couple of comment typos. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200303174950.3298-5-peter.maydell@linaro.org
2020-03-12target/arm: Recalculate hflags correctly after writes to CONTROLPeter Maydell
A write to the CONTROL register can change our current EL (by writing to the nPRIV bit). That means that we can't assume that s->current_el is still valid in trans_MSR_v7m() when we try to rebuild the hflags. Add a new helper rebuild_hflags_m32_newel() which, like the existing rebuild_hflags_a32_newel(), recalculates the current EL from scratch, and use it in trans_MSR_v7m(). This fixes an assertion about an hflags mismatch when the guest changes privilege by writing to CONTROL. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200303174950.3298-4-peter.maydell@linaro.org
2020-03-12target/arm: Update hflags in trans_CPS_v7m()Peter Maydell
For M-profile CPUs, the FAULTMASK value affects the CPU's MMU index (it changes the NegPri bit). We update the hflags after calls to the v7m_msr helper in trans_MSR_v7m() but forgot to do so in trans_CPS_v7m(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200303174950.3298-3-peter.maydell@linaro.org
2020-03-12hw/intc/armv7m_nvic: Rebuild hflags on resetPeter Maydell
Some of an M-profile CPU's cached hflags state depends on state that's in our NVIC object. We already do an hflags rebuild when the NVIC registers are written, but we also need to do this on NVIC reset, because there's no guarantee that this will happen before the CPU reset. This fixes an assertion due to mismatched hflags which happens if the CPU is reset from inside a HardFault handler. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200303174950.3298-2-peter.maydell@linaro.org
2020-03-12Merge remote-tracking branch 'remotes/pmaydell/tags/pull-docs-20200312' into ↵Peter Maydell
staging docs queue: * Remove some no longer needed texinfo infrastructure * Reorder the top level index docs to put most useful manuals first * Split the Arm target-specific info into sub-pages * Improve the Arm documentation a bit with info previously only on the wiki page # gpg: Signature made Thu 12 Mar 2020 11:42:10 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-docs-20200312: docs: Be consistent about capitalization of 'Arm' docs: Move arm-cpu-features.rst into the system manual docs/system/target-arm.rst: Add some introductory text docs/system: Split target-arm.rst into sub-documents Makefile: Allow for subdirectories in Sphinx manual dependencies docs/qemu-option-trace.rst.inc: Remove redundant comment docs/index.rst, docs/index.html.in: Reorder manuals Makefile: Make all Sphinx documentation depend on the extensions docs/sphinx/hxtool.py: Remove STEXI/ETEXI support hxtool: Remove Texinfo generation support Update comments in .hx files that mention Texinfo Makefile: Remove redundant Texinfo related code Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12Merge remote-tracking branch 'remotes/gkurz/tags/9p-next-2020-03-10' into ↵Peter Maydell
staging Fix the proxy fsdev so that it honours "readonly" and "writeout". # gpg: Signature made Tue 10 Mar 2020 15:16:39 GMT # gpg: using RSA key B4828BAF943140CEF2A3491071D4D5E5822F73D6 # gpg: Good signature from "Greg Kurz <groug@kaod.org>" [full] # gpg: aka "Gregory Kurz <gregory.kurz@free.fr>" [full] # gpg: aka "[jpeg image of size 3330]" [full] # Primary key fingerprint: B482 8BAF 9431 40CE F2A3 4910 71D4 D5E5 822F 73D6 * remotes/gkurz/tags/9p-next-2020-03-10: 9p/proxy: Fix export_flags Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-12tests: Disable dbus-vmstate-testPeter Maydell
The dbus-vmstate-test has been failing in some Patchew configs since about the 6th March: dbus-daemon[9321]: Could not get password database information for UID of current process: User "???" unknown or no memory to allocate password entry ** ERROR:/tmp/qemu-test/src/tests/qtest/dbus-vmstate-test.c:114:get_connection: assertion failed (err == NULL): The connection is closed (g-io-error-quark, 18) cleaning up pid 9321 ERROR - Bail out! ERROR:/tmp/qemu-test/src/tests/qtest/dbus-vmstate-test.c:114:get_connection: assertion failed (err == NULL): The connection is closed (g-io-error-quark, 18) make: *** [/tmp/qemu-test/src/tests/Makefile.include:632: check-qtest-x86_64] Error 1 make: *** Waiting for unfinished jobs.... It's not clear why this is happening (perhaps a recently revealed race condition or a change in the patchew build environment?). For the moment, disable this test so that patchew test runs are useful and don't email the list with spurious failure mails. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200310152141.13959-1-peter.maydell@linaro.org
2020-03-12docs: Be consistent about capitalization of 'Arm'Peter Maydell
The company 'Arm' went through a rebranding some years back involving a recapitalization from 'ARM' to 'Arm'. As a result our documentation is a bit inconsistent between the two forms. It's not worth trying to update everywhere in QEMU, but it's easy enough to make docs/ consistent. Note that "ARMv8" and similar architecture names, and older CPU names like "ARM926" still retain all-caps. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20200309215818.2021-6-peter.maydell@linaro.org
2020-03-12docs: Move arm-cpu-features.rst into the system manualPeter Maydell
Now we have somewhere to put arm-specific rst documentation, we can move arm-cpu-features.rst from the docs/ top level directory into docs/system/arm/. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20200309215818.2021-5-peter.maydell@linaro.org
2020-03-12docs/system/target-arm.rst: Add some introductory textPeter Maydell
Now we've moved the various bits of per-board documentation into their own files, the top level document is a little bare. Add some introductory information, including a note that many of the board models we support are currently undocumented. (Most sections of this new text were originally written by me for the wiki page https://wiki.qemu.org/Documentation/Platforms/ARM) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20200309215818.2021-4-peter.maydell@linaro.org
2020-03-12docs/system: Split target-arm.rst into sub-documentsPeter Maydell
Currently the documentation for Arm system emulator targets is in a single target-arm.rst. This describes only some of the boards and often in a fairly abbreviated fashion. Restructure it so that each board has its own documentation file in the docs/system/arm/ subdirectory. This will hopefully encourage us to write board documentation that describes the board in detail, rather than a few brief paragraphs in a single long page. The table of contents should also help users to find the board they care about faster. Once the structure is in place we'll be able to move microvm.rst from the top-level docs/ directory. All the text from the old page is retained, except for the final paragraph ("A Linux 2.6 test image is available on the QEMU web site. More information is available in the QEMU mailing-list archive."), which is deleted. The git history shows this was originally added in reference to the integratorcp board (at that time the only Arm board that was supported), and has subsequently gradually been further and further separated from the integratorcp documentation by the insertion of other board documentation sections. It's extremely out of date and no longer accurate, since AFAICT there isn't an integratorcp kernel on the website any more; so better deleted than retained. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20200309215818.2021-3-peter.maydell@linaro.org
2020-03-12Makefile: Allow for subdirectories in Sphinx manual dependenciesPeter Maydell
Currently we put 'docs/foo/*.rst' in the Make list of dependencies for the Sphinx 'foo' manual, which means all the files must be in the top level of that manual's directory. We'd like to be able to have subdirectories inside some of the manuals, so add 'docs/foo/*/*.rst' to the dependencies too. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200309215818.2021-2-peter.maydell@linaro.org
2020-03-12docs/qemu-option-trace.rst.inc: Remove redundant commentPeter Maydell
The Texinfo version of the tracing options documentation has now been deleted, so we can remove the now-redundant comment at the top of the rST version that was reminding us that the two should be kept in sync. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200306171749.10756-8-peter.maydell@linaro.org
2020-03-12docs/index.rst, docs/index.html.in: Reorder manualsPeter Maydell
Now that qemu-doc.html is no longer present, the ordering of manuals within the top-level index page looks a bit odd. Reshuffle so that the manuals the user is most likely to be interested in are at the top of the list, and the reference material is at the bottom. Similarly, we reorder the index.rst file used as the base of the "all manuals in one" documentation for readthedocs. The new order is: * system * user * tools * interop * specs * QMP reference (if present) * Guest agent protocol reference (if present) * devel (if present) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200306171749.10756-7-peter.maydell@linaro.org
2020-03-12Makefile: Make all Sphinx documentation depend on the extensionsPeter Maydell
Add the Python source files of our Sphinx extensions to the dependencies of the Sphinx manuals, so that if we edit the extension source code the manuals get rebuilt. Adding this dependency unconditionally means that we'll rebuild a manual even if it happens to not use the extension whose source file was changed, but this is simpler and less error prone, and it's unlikely that we'll be making frequent changes to the extensions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200306171749.10756-6-peter.maydell@linaro.org
2020-03-12docs/sphinx/hxtool.py: Remove STEXI/ETEXI supportPeter Maydell
Now that none of our input .hx files have STEXI/ETEXI blocks, we can remove the code in the Sphinx hxtool extension that supported parsing them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200306171749.10756-5-peter.maydell@linaro.org
2020-03-12hxtool: Remove Texinfo generation supportPeter Maydell
All the STEXI/ETEXI blocks and the Makfile rules that use them have now been removed from the codebase. We can remove the code from the hxtool script which handles the STEXI/ETEXI directives and the '-t' option. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200306171749.10756-4-peter.maydell@linaro.org
2020-03-12Update comments in .hx files that mention TexinfoPeter Maydell
Update the header comments in .hx files that mention STEXI/ETEXI markup; this is now SRST/ERST as all these files have been converted to rST. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200306171749.10756-3-peter.maydell@linaro.org
2020-03-12Makefile: Remove redundant Texinfo related codePeter Maydell
The recent conversion of qemu-doc.texi to rST forgot a few stray bits of makefile code that are now redundant. Remove them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200306171749.10756-2-peter.maydell@linaro.org
2020-03-11Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2020-03-11' ↵Peter Maydell
into staging Block patches for the 5.0 softfreeze: - qemu-img measure for LUKS - Improve block-copy's performance by reducing inter-request dependencies - Make curl's detection of accept-ranges more robust - Memleak fixes - iotest fix # gpg: Signature made Wed 11 Mar 2020 13:19:01 GMT # gpg: using RSA key 91BEB60A30DB3E8857D11829F407DB0061D5CF40 # gpg: issuer "mreitz@redhat.com" # gpg: Good signature from "Max Reitz <mreitz@redhat.com>" [full] # Primary key fingerprint: 91BE B60A 30DB 3E88 57D1 1829 F407 DB00 61D5 CF40 * remotes/maxreitz/tags/pull-block-2020-03-11: block/block-copy: hide structure definitions block/block-copy: reduce intersecting request lock block/block-copy: rename start to offset in interfaces block/block-copy: refactor interfaces to use bytes instead of end block/block-copy: factor out find_conflicting_inflight_req block/block-copy: use block_status block/block-copy: specialcase first copy_range request block/block-copy: fix progress calculation job: refactor progress to separate object block/qcow2-threads: fix qcow2_decompress qemu-img: free memory before re-assign block/qcow2: do free crypto_opts in qcow2_close() iotests: Fix nonportable use of od --endian block/curl: HTTP header field names are case insensitive block/curl: HTTP header fields allow whitespace around values iotests: add 288 luks qemu-img measure test qemu-img: allow qemu-img measure --object without a filename luks: implement .bdrv_measure() luks: extract qcrypto_block_calculate_payload_offset() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-11Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell
staging Pull request # gpg: Signature made Wed 11 Mar 2020 12:40:36 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: aio-posix: remove idle poll handlers to improve scalability aio-posix: support userspace polling of fd monitoring aio-posix: add io_uring fd monitoring implementation aio-posix: simplify FDMonOps->update() prototype aio-posix: extract ppoll(2) and epoll(7) fd monitoring aio-posix: move RCU_READ_LOCK() into run_poll_handlers() aio-posix: completely stop polling when disabled aio-posix: remove confusing QLIST_SAFE_REMOVE() qemu/queue.h: clear linked list pointers on remove Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-11block/block-copy: hide structure definitionsVladimir Sementsov-Ogievskiy
Hide structure definitions and add explicit API instead, to keep an eye on the scope of the shared fields. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Andrey Shinkevich <andrey.shinkevich@virtuozzo.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-Id: <20200311103004.7649-10-vsementsov@virtuozzo.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
2020-03-11block/block-copy: reduce intersecting request lockVladimir Sementsov-Ogievskiy
Currently, block_copy operation lock the whole requested region. But there is no reason to lock clusters, which are already copied, it will disturb other parallel block_copy requests for no reason. Let's instead do the following: Lock only sub-region, which we are going to operate on. Then, after copying all dirty sub-regions, we should wait for intersecting requests block-copy, if they failed, we should retry these new dirty clusters. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Andrey Shinkevich <andrey.shinkevich@virtuozzo.com> Message-Id: <20200311103004.7649-9-vsementsov@virtuozzo.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
2020-03-11block/block-copy: rename start to offset in interfacesVladimir Sementsov-Ogievskiy
offset/bytes pair is more usual naming in block layer, let's use it. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Andrey Shinkevich <andrey.shinkevich@virtuozzo.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-Id: <20200311103004.7649-8-vsementsov@virtuozzo.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
2020-03-11block/block-copy: refactor interfaces to use bytes instead of endVladimir Sementsov-Ogievskiy
We have a lot of "chunk_end - start" invocations, let's switch to bytes/cur_bytes scheme instead. While being here, improve check on block_copy_do_copy parameters to not overflow when calculating nbytes and use int64_t for bytes in block_copy for consistency. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Andrey Shinkevich <andrey.shinkevich@virtuozzo.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-Id: <20200311103004.7649-7-vsementsov@virtuozzo.com> Signed-off-by: Max Reitz <mreitz@redhat.com>
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