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-rw-r--r--target/m68k/cpu.c2
-rw-r--r--target/m68k/cpu.h1
-rw-r--r--target/m68k/translate.c46
3 files changed, 49 insertions, 0 deletions
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 6a80be009b..3026714471 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -113,6 +113,7 @@ static void m68000_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_M68000);
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+ m68k_set_feature(env, M68K_FEATURE_MOVEP);
}
static void m68020_cpu_initfn(Object *obj)
@@ -135,6 +136,7 @@ static void m68020_cpu_initfn(Object *obj)
m68k_set_feature(env, M68K_FEATURE_BKPT);
m68k_set_feature(env, M68K_FEATURE_RTD);
m68k_set_feature(env, M68K_FEATURE_CHK2);
+ m68k_set_feature(env, M68K_FEATURE_MOVEP);
}
#define m68030_cpu_initfn m68020_cpu_initfn
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 627fb787b6..1d79885222 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -492,6 +492,7 @@ enum m68k_features {
M68K_FEATURE_RTD,
M68K_FEATURE_CHK2,
M68K_FEATURE_M68040, /* instructions specific to MC68040 */
+ M68K_FEATURE_MOVEP,
};
static inline int m68k_feature(CPUM68KState *env, int feature)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 34db97b8a0..70c7583621 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2078,6 +2078,51 @@ DISAS_INSN(movem)
tcg_temp_free(addr);
}
+DISAS_INSN(movep)
+{
+ uint8_t i;
+ int16_t displ;
+ TCGv reg;
+ TCGv addr;
+ TCGv abuf;
+ TCGv dbuf;
+
+ displ = read_im16(env, s);
+
+ addr = AREG(insn, 0);
+ reg = DREG(insn, 9);
+
+ abuf = tcg_temp_new();
+ tcg_gen_addi_i32(abuf, addr, displ);
+ dbuf = tcg_temp_new();
+
+ if (insn & 0x40) {
+ i = 4;
+ } else {
+ i = 2;
+ }
+
+ if (insn & 0x80) {
+ for ( ; i > 0 ; i--) {
+ tcg_gen_shri_i32(dbuf, reg, (i - 1) * 8);
+ tcg_gen_qemu_st8(dbuf, abuf, IS_USER(s));
+ if (i > 1) {
+ tcg_gen_addi_i32(abuf, abuf, 2);
+ }
+ }
+ } else {
+ for ( ; i > 0 ; i--) {
+ tcg_gen_qemu_ld8u(dbuf, abuf, IS_USER(s));
+ tcg_gen_deposit_i32(reg, reg, dbuf, (i - 1) * 8, 8);
+ if (i > 1) {
+ tcg_gen_addi_i32(abuf, abuf, 2);
+ }
+ }
+ }
+ tcg_temp_free(abuf);
+ tcg_temp_free(dbuf);
+}
+
DISAS_INSN(bitop_im)
{
int opsize;
@@ -5678,6 +5723,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(bitop_reg, 0140, f1c0);
BASE(bitop_reg, 0180, f1c0);
BASE(bitop_reg, 01c0, f1c0);
+ INSN(movep, 0108, f138, MOVEP);
INSN(arith_im, 0280, fff8, CF_ISA_A);
INSN(arith_im, 0200, ff00, M68000);
INSN(undef, 02c0, ffc0, M68000);