3 files changed, 14 insertions, 14 deletions
diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
index d68be226ee..55d2dea266 100644
--- a/target-xtensa/cpu.c
+++ b/target-xtensa/cpu.c
@@ -1,6 +1,7 @@
 /*
  * QEMU Xtensa CPU
  *
+ * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  * All rights reserved.
  *
@@ -40,7 +41,16 @@ static void xtensa_cpu_reset(CPUState *s)
 
     xcc->parent_reset(s);
 
-    cpu_state_reset(env);
+    env->exception_taken = 0;
+    env->pc = env->config->exception_vector[EXC_RESET];
+    env->sregs[LITBASE] &= ~1;
+    env->sregs[PS] = xtensa_option_enabled(env->config,
+            XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
+    env->sregs[VECBASE] = env->config->vecbase;
+    env->sregs[IBREAKENABLE] = 0;
+
+    env->pending_irq_level = 0;
+    reset_mmu(env);
 }
 
 static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 2de5144e5f..6d0ea7c038 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -375,6 +375,7 @@ void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
 int xtensa_get_physical_addr(CPUXtensaState *env,
         uint32_t vaddr, int is_write, int mmu_idx,
         uint32_t *paddr, uint32_t *page_size, unsigned *access);
+void reset_mmu(CPUXtensaState *env);
 void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env);
 void debug_exception_env(CPUXtensaState *new_env, uint32_t cause);
 
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 20338e61c6..000f965d7b 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -33,20 +33,9 @@
 #include "hw/loader.h"
 #endif
 
-static void reset_mmu(CPUXtensaState *env);
-
 void cpu_state_reset(CPUXtensaState *env)
 {
-    env->exception_taken = 0;
-    env->pc = env->config->exception_vector[EXC_RESET];
-    env->sregs[LITBASE] &= ~1;
-    env->sregs[PS] = xtensa_option_enabled(env->config,
-            XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
-    env->sregs[VECBASE] = env->config->vecbase;
-    env->sregs[IBREAKENABLE] = 0;
-
-    env->pending_irq_level = 0;
-    reset_mmu(env);
+    cpu_reset(ENV_GET_CPU(env));
 }
 
 static struct XtensaConfigList *xtensa_cores;
@@ -336,7 +325,7 @@ static void reset_tlb_region_way0(CPUXtensaState *env,
     }
 }
 
-static void reset_mmu(CPUXtensaState *env)
+void reset_mmu(CPUXtensaState *env)
 {
     if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) {
         env->sregs[RASID] = 0x04030201;