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-rw-r--r--target-mips/op.c5
-rw-r--r--target-mips/translate.c3
2 files changed, 6 insertions, 2 deletions
diff --git a/target-mips/op.c b/target-mips/op.c
index 4eb8a8926d..026b08ab6f 100644
--- a/target-mips/op.c
+++ b/target-mips/op.c
@@ -1374,8 +1374,9 @@ void op_mtc0_status (void)
void op_mtc0_intctl (void)
{
- /* vectored interrupts not implemented */
- env->CP0_IntCtl = 0;
+ /* vectored interrupts not implemented, timer on int 7,
+ no performance counters. */
+ env->CP0_IntCtl |= T0 & 0x000002e0;
RETURN();
}
diff --git a/target-mips/translate.c b/target-mips/translate.c
index a1af8ab3b5..0d9226a066 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -5405,6 +5405,9 @@ void cpu_reset (CPUMIPSState *env)
/* SMP not implemented */
env->CP0_EBase = 0x80000000;
env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL);
+ /* vectored interrupts not implemented, timer on int 7,
+ no performance counters. */
+ env->CP0_IntCtl = 0xe0000000;
env->CP0_WatchLo = 0;
env->CP0_WatchHi = 0;
/* Count register increments in debug mode, EJTAG version 1 */