diff options
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 6f295d4a50..5014bdf252 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -5450,19 +5450,33 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs) static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf) { + TCGv r_ptr = tcg_temp_new(TCG_TYPE_PTR); + TCGv r_tmp = new_tmp(); + TCGv t0 = tcg_temp_new(TCG_TYPE_TL); + TCGv t1 = tcg_temp_new(TCG_TYPE_TL); + int l1 = gen_new_label(); uint32_t ccbit; + TCGCond cond; - gen_load_gpr(cpu_T[0], rd); - gen_load_gpr(cpu_T[1], rs); - if (cc) { + if (cc) ccbit = 1 << (24 + cc); - } else + else ccbit = 1 << 23; - if (!tf) - gen_op_movf(ccbit); + if (tf) + cond = TCG_COND_NE; else - gen_op_movt(ccbit); - gen_store_gpr(cpu_T[0], rd); + cond = TCG_COND_EQ; + + gen_load_gpr(t0, rd); + gen_load_gpr(t1, rs); + tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu)); + tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31)); + tcg_gen_andi_i32(r_tmp, r_tmp, ccbit); + tcg_gen_brcond_i32(cond, r_tmp, tcg_const_i32(0), l1); + tcg_gen_mov_tl(t0, t1); + gen_set_label(l1); + dead_tmp(r_tmp); + gen_store_gpr(t0, rd); } #define GEN_MOVCF(fmt) \ |