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-rw-r--r--include/hw/compat.h4
-rw-r--r--include/hw/i386/apic_internal.h6
-rw-r--r--include/hw/i386/intel_iommu.h2
3 files changed, 12 insertions, 0 deletions
diff --git a/include/hw/compat.h b/include/hw/compat.h
index ef3fae3e1b..0f06e113be 100644
--- a/include/hw/compat.h
+++ b/include/hw/compat.h
@@ -14,6 +14,10 @@
.driver = "ioapic",\
.property = "version",\
.value = "0x11",\
+ },{\
+ .driver = "intel-iommu",\
+ .property = "x-buggy-eim",\
+ .value = "true",\
},
#define HW_COMPAT_2_6 \
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 06c4e9f6f9..cdd11fb093 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -146,6 +146,10 @@ typedef struct APICCommonClass
void (*pre_save)(APICCommonState *s);
void (*post_load)(APICCommonState *s);
void (*reset)(APICCommonState *s);
+ /* send_msi emulates an APIC bus and its proper place would be in a new
+ * device, but it's convenient to have it here for now.
+ */
+ void (*send_msi)(MSIMessage *msi);
} APICCommonClass;
struct APICCommonState {
@@ -222,4 +226,6 @@ static inline int apic_get_bit(uint32_t *tab, int index)
return !!(tab[i] & mask);
}
+APICCommonClass *apic_get_class(void);
+
#endif /* QEMU_APIC_INTERNAL_H */
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index a42dbd745a..1989c1eec1 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -289,6 +289,8 @@ struct IntelIOMMUState {
dma_addr_t intr_root; /* Interrupt remapping table pointer */
uint32_t intr_size; /* Number of IR table entries */
bool intr_eime; /* Extended interrupt mode enabled */
+ OnOffAuto intr_eim; /* Toggle for EIM cabability */
+ bool buggy_eim; /* Force buggy EIM unless eim=off */
};
/* Find the VTD Address space associated with the given bus pointer,