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-rw-r--r--hw/i2c/pm_smbus.c5
-rw-r--r--hw/i386/pc.c2
-rw-r--r--hw/input/pckbd.c4
-rw-r--r--hw/intc/i8259.c2
-rw-r--r--hw/isa/apm.c5
-rw-r--r--hw/timer/mc146818rtc.c2
6 files changed, 11 insertions, 9 deletions
diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c
index fedb5fb4d4..ce1713d267 100644
--- a/hw/i2c/pm_smbus.c
+++ b/hw/i2c/pm_smbus.c
@@ -139,7 +139,8 @@ static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
{
PMSMBus *s = opaque;
- SMBUS_DPRINTF("SMB writeb port=0x%04x val=0x%02x\n", addr, val);
+ SMBUS_DPRINTF("SMB writeb port=0x%04" HWADDR_PRIx
+ " val=0x%02" PRIx64 "\n", addr, val);
switch(addr) {
case SMBHSTSTS:
s->smb_stat = (~(val & 0xff)) & s->smb_stat;
@@ -206,7 +207,7 @@ static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width)
val = 0;
break;
}
- SMBUS_DPRINTF("SMB readb port=0x%04x val=0x%02x\n", addr, val);
+ SMBUS_DPRINTF("SMB readb port=0x%04" HWADDR_PRIx " val=0x%02x\n", addr, val);
return val;
}
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 0ca4deb1b3..b6c9b61801 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -481,7 +481,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
Port92State *s = opaque;
int oldval = s->outport;
- DPRINTF("port92: write 0x%02x\n", val);
+ DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
s->outport = val;
qemu_set_irq(*s->a20_out, (val >> 1) & 1);
if ((val & 1) && !(oldval & 1)) {
diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
index ca1cffcc05..2ab8c873b6 100644
--- a/hw/input/pckbd.c
+++ b/hw/input/pckbd.c
@@ -229,7 +229,7 @@ static void kbd_write_command(void *opaque, hwaddr addr,
{
KBDState *s = opaque;
- DPRINTF("kbd: write cmd=0x%02x\n", val);
+ DPRINTF("kbd: write cmd=0x%02" PRIx64 "\n", val);
/* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
* low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
@@ -330,7 +330,7 @@ static void kbd_write_data(void *opaque, hwaddr addr,
{
KBDState *s = opaque;
- DPRINTF("kbd: write data=0x%02x\n", val);
+ DPRINTF("kbd: write data=0x%02" PRIx64 "\n", val);
switch(s->write_cmd) {
case 0:
diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c
index a563b82c4e..c51901bfb6 100644
--- a/hw/intc/i8259.c
+++ b/hw/intc/i8259.c
@@ -370,7 +370,7 @@ static uint64_t pic_ioport_read(void *opaque, hwaddr addr,
ret = s->imr;
}
}
- DPRINTF("read: addr=0x%02x val=0x%02x\n", addr, ret);
+ DPRINTF("read: addr=0x%02" HWADDR_PRIx " val=0x%02x\n", addr, ret);
return ret;
}
diff --git a/hw/isa/apm.c b/hw/isa/apm.c
index 054d529b8b..26ab170215 100644
--- a/hw/isa/apm.c
+++ b/hw/isa/apm.c
@@ -41,7 +41,8 @@ static void apm_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
{
APMState *apm = opaque;
addr &= 1;
- APM_DPRINTF("apm_ioport_writeb addr=0x%x val=0x%02x\n", addr, val);
+ APM_DPRINTF("apm_ioport_writeb addr=0x%" HWADDR_PRIx
+ " val=0x%02" PRIx64 "\n", addr, val);
if (addr == 0) {
apm->apmc = val;
@@ -64,7 +65,7 @@ static uint64_t apm_ioport_readb(void *opaque, hwaddr addr, unsigned size)
} else {
val = apm->apms;
}
- APM_DPRINTF("apm_ioport_readb addr=0x%x val=0x%02x\n", addr, val);
+ APM_DPRINTF("apm_ioport_readb addr=0x%" HWADDR_PRIx " val=0x%02x\n", addr, val);
return val;
}
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index 4df650f450..17912b847f 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -391,7 +391,7 @@ static void cmos_ioport_write(void *opaque, hwaddr addr,
if ((addr & 1) == 0) {
s->cmos_index = data & 0x7f;
} else {
- CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02x\n",
+ CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02" PRIx64 "\n",
s->cmos_index, data);
switch(s->cmos_index) {
case RTC_SECONDS_ALARM: