diff options
| -rw-r--r-- | target/mips/cpu.h | 2 | ||||
| -rw-r--r-- | target/mips/translate.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h index c4da7dfbfd..473d26d6ff 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1173,7 +1173,7 @@ int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); #define CPU_RESOLVING_TYPE TYPE_MIPS_CPU bool cpu_supports_cps_smp(const char *cpu_type); -bool cpu_supports_isa(const char *cpu_type, unsigned int isa); +bool cpu_supports_isa(const char *cpu_type, uint64_t isa); void cpu_set_exception_base(int vp_index, target_ulong address); /* mips_int.c */ diff --git a/target/mips/translate.c b/target/mips/translate.c index 2140ecda97..b362b03d74 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -29883,7 +29883,7 @@ bool cpu_supports_cps_smp(const char *cpu_type) return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; } -bool cpu_supports_isa(const char *cpu_type, unsigned int isa) +bool cpu_supports_isa(const char *cpu_type, uint64_t isa) { const MIPSCPUClass *mcc = MIPS_CPU_CLASS(object_class_by_name(cpu_type)); return (mcc->cpu_def->insn_flags & isa) != 0; |