diff options
| -rw-r--r-- | target-arm/arm_ldst.h | 47 | ||||
| -rw-r--r-- | target-arm/cpu.h | 22 | ||||
| -rw-r--r-- | target-arm/helper.c | 1 | ||||
| -rw-r--r-- | target-arm/translate-a64.c | 1 | ||||
| -rw-r--r-- | target-arm/translate.c | 1 |
5 files changed, 50 insertions, 22 deletions
diff --git a/target-arm/arm_ldst.h b/target-arm/arm_ldst.h new file mode 100644 index 0000000000..007a7d7705 --- /dev/null +++ b/target-arm/arm_ldst.h @@ -0,0 +1,47 @@ +/* + * ARM load/store instructions for code (armeb-user support) + * + * Copyright (c) 2012 CodeSourcery, LLC + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef ARM_LDST_H +#define ARM_LDST_H + +#include "qemu/bswap.h" + +/* Load an instruction and return it in the standard little-endian order */ +static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr, + bool do_swap) +{ + uint32_t insn = cpu_ldl_code(env, addr); + if (do_swap) { + return bswap32(insn); + } + return insn; +} + +/* Ditto, for a halfword (Thumb) instruction */ +static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr, + bool do_swap) +{ + uint16_t insn = cpu_lduw_code(env, addr); + if (do_swap) { + return bswap16(insn); + } + return insn; +} + +#endif diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 8d04385261..7d8332e8be 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1199,26 +1199,4 @@ static inline void cpu_pc_from_tb(CPUARMState *env, TranslationBlock *tb) } } -/* Load an instruction and return it in the standard little-endian order */ -static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr, - bool do_swap) -{ - uint32_t insn = cpu_ldl_code(env, addr); - if (do_swap) { - return bswap32(insn); - } - return insn; -} - -/* Ditto, for a halfword (Thumb) instruction */ -static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr, - bool do_swap) -{ - uint16_t insn = cpu_lduw_code(env, addr); - if (do_swap) { - return bswap16(insn); - } - return insn; -} - #endif diff --git a/target-arm/helper.c b/target-arm/helper.c index ec031f5947..861baf5d7b 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -7,6 +7,7 @@ #include "sysemu/sysemu.h" #include "qemu/bitops.h" #include "qemu/crc32c.h" +#include "arm_ldst.h" #include <zlib.h> /* For crc32 */ #ifndef CONFIG_USER_ONLY diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 9f964dfd5d..a9c4633517 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -25,6 +25,7 @@ #include "cpu.h" #include "tcg-op.h" #include "qemu/log.h" +#include "arm_ldst.h" #include "translate.h" #include "internals.h" #include "qemu/host-utils.h" diff --git a/target-arm/translate.c b/target-arm/translate.c index 7f6fcd699e..d499caa562 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -30,6 +30,7 @@ #include "tcg-op.h" #include "qemu/log.h" #include "qemu/bitops.h" +#include "arm_ldst.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" |