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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-30 02:09:25 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-30 02:09:25 +0000
commit3e3d5815cbc1fdbf33adbe55f63ede3acead886f (patch)
treec4ce11c30f46fd1c966bb7ee1f80d06a329ade65 /vl.h
parent18c9b56060e6d69e38d0d91ffb02d510d8ce1971 (diff)
downloadqemu-3e3d5815cbc1fdbf33adbe55f63ede3acead886f.zip
NAND Flash memory emulation and ECC calculation helpers for use by NAND controllers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2753 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'vl.h')
-rw-r--r--vl.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/vl.h b/vl.h
index 23d8dd668b..e427991ffb 100644
--- a/vl.h
+++ b/vl.h
@@ -967,6 +967,7 @@ extern uint8_t _translate_keycode(const int key);
extern BlockDriverState *bs_table[MAX_DISKS + 1];
extern BlockDriverState *sd_bdrv;
+extern BlockDriverState *mtd_bdrv;
void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
BlockDriverState *hd0, BlockDriverState *hd1);
@@ -1478,6 +1479,27 @@ pflash_t *pflash_register (target_ulong base, ram_addr_t off,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3);
+/* nand.c */
+struct nand_flash_s;
+struct nand_flash_s *nand_init(int manf_id, int chip_id);
+void nand_done(struct nand_flash_s *s);
+void nand_setpins(struct nand_flash_s *s,
+ int cle, int ale, int ce, int wp, int gnd);
+void nand_getpins(struct nand_flash_s *s, int *rb);
+void nand_setio(struct nand_flash_s *s, uint8_t value);
+uint8_t nand_getio(struct nand_flash_s *s);
+
+#define NAND_MFR_TOSHIBA 0x98
+#define NAND_MFR_SAMSUNG 0xec
+#define NAND_MFR_FUJITSU 0x04
+#define NAND_MFR_NATIONAL 0x8f
+#define NAND_MFR_RENESAS 0x07
+#define NAND_MFR_STMICRO 0x20
+#define NAND_MFR_HYNIX 0xad
+#define NAND_MFR_MICRON 0x2c
+
+#include "ecc.h"
+
/* PCMCIA/Cardbus */
struct pcmcia_socket_s {