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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-18 00:30:29 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-18 00:30:29 +0000
commit33d68b5f00011c8101aec93ba1bb2b470e35151d (patch)
treedf41613ca2a6c811fcc0289ba6a16f2fce476dc3 /vl.h
parente24ad6f140f23e1edc1646ea248819698b77f0e2 (diff)
downloadqemu-33d68b5f00011c8101aec93ba1bb2b470e35151d.zip
MIPS -cpu selection support, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'vl.h')
-rw-r--r--vl.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/vl.h b/vl.h
index c7c7d73a0d..464bf899c0 100644
--- a/vl.h
+++ b/vl.h
@@ -713,6 +713,10 @@ typedef void IRQRequestFunc(void *opaque, int level);
void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
#endif
+#if defined(TARGET_MIPS)
+void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+#endif
+
/* ISA bus */
extern target_phys_addr_t isa_mem_base;