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authorPeter Maydell <peter.maydell@linaro.org>2017-06-22 10:25:03 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-06-22 10:25:03 +0100
commitdb7a99cdc1d0f4d8cbf7c41ce9e570dce04f0a11 (patch)
tree47fd7ac1842e033dc163ed63788bc818af0d5a7e /util/Makefile.objs
parent8dfaf23ae1f2273a9730a9b309cc8471269bb524 (diff)
parent8da54b2507c1cabf60c2de904cf0383b23239231 (diff)
downloadqemu-db7a99cdc1d0f4d8cbf7c41ce9e570dce04f0a11.zip
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170619' into staging
Queued TCG patches # gpg: Signature made Mon 19 Jun 2017 19:12:06 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170619: target/arm: Exit after clearing aarch64 interrupt mask target/s390x: Exit after changing PSW mask target/alpha: Use tcg_gen_lookup_and_goto_ptr tcg: Increase hit rate of lookup_tb_ptr tcg/arm: Use ldr (literal) for goto_tb tcg/arm: Try pc-relative addresses for movi tcg/arm: Remove limit on code buffer size tcg/arm: Use indirect branch for goto_tb tcg/aarch64: Use ADR in tcg_out_movi translate-all: consolidate tb init in tb_gen_code tcg: allocate TB structs before the corresponding translated code util: add cacheinfo Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'util/Makefile.objs')
-rw-r--r--util/Makefile.objs1
1 files changed, 1 insertions, 0 deletions
diff --git a/util/Makefile.objs b/util/Makefile.objs
index 8a333d3dd7..50a55ecc75 100644
--- a/util/Makefile.objs
+++ b/util/Makefile.objs
@@ -20,6 +20,7 @@ util-obj-y += host-utils.o
util-obj-y += bitmap.o bitops.o hbitmap.o
util-obj-y += fifo8.o
util-obj-y += acl.o
+util-obj-y += cacheinfo.o
util-obj-y += error.o qemu-error.o
util-obj-y += id.o
util-obj-y += iov.o qemu-config.o qemu-sockets.o uri.o notify.o