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authorLaurent Vivier <laurent@vivier.eu>2019-05-26 00:50:04 +0200
committerThomas Huth <huth@tuxfamily.org>2019-09-07 08:32:12 +0200
commitb43047a20feba0ff1eaf6a49007e2d5402df3d46 (patch)
treee32142faa0126941c407f3243a21844b48e4569e /tests/check-qobject.c
parent956a78118bfc7fa512b03cbe8a77b9384c6d89f4 (diff)
downloadqemu-b43047a20feba0ff1eaf6a49007e2d5402df3d46.zip
escc: introduce a selector for the register bit
On Sparc and PowerMac, the bit 0 of the address selects the register type (control or data) and bit 1 selects the channel (B or A). On m68k Macintosh and NeXTcube, the bit 0 selects the channel and bit 1 the register type. This patch introduces a new parameter (bit_swap) to the device interface to indicate bits usage must be swapped between registers and channels. For the moment all the machines use the bit 0, but this change will be needed to emulate the Quadra 800 or NeXTcube machine. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> [thh: added NeXTcube to the patch description] Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190831074519.32613-5-huth@tuxfamily.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
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