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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-03 07:08:36 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-03 07:08:36 +0000
commit158245714ecbd9263bfe34ad47089fcc1fa34f82 (patch)
tree91d77c147c9657eec5c89c69715d2e48cac529e1 /tcg/tcg-op.h
parentf02bb954a555e997869e5a92d79b0234b39eadad (diff)
downloadqemu-158245714ecbd9263bfe34ad47089fcc1fa34f82.zip
tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5607 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg/tcg-op.h')
-rw-r--r--tcg/tcg-op.h118
1 files changed, 118 insertions, 0 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index f199ce0131..58af59cc25 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1518,6 +1518,116 @@ static inline void tcg_gen_orc_i64(TCGv ret, TCGv arg1, TCGv arg2)
tcg_temp_free(t0);
}
+static inline void tcg_gen_rotl_i32(TCGv ret, TCGv arg1, TCGv arg2)
+{
+ TCGv t0, t1;
+
+ t0 = tcg_temp_new(TCG_TYPE_I32);
+ t1 = tcg_temp_new(TCG_TYPE_I32);
+ tcg_gen_shl_i32(t0, arg1, arg2);
+ tcg_gen_subfi_i32(t1, 32, arg2);
+ tcg_gen_shr_i32(t1, arg1, t1);
+ tcg_gen_or_i32(ret, t0, t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+}
+
+static inline void tcg_gen_rotl_i64(TCGv ret, TCGv arg1, TCGv arg2)
+{
+ TCGv t0, t1;
+
+ t0 = tcg_temp_new(TCG_TYPE_I64);
+ t1 = tcg_temp_new(TCG_TYPE_I64);
+ tcg_gen_shl_i64(t0, arg1, arg2);
+ tcg_gen_subfi_i64(t1, 64, arg2);
+ tcg_gen_shr_i64(t1, arg1, t1);
+ tcg_gen_or_i64(ret, t0, t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+}
+
+static inline void tcg_gen_rotli_i32(TCGv ret, TCGv arg1, int32_t arg2)
+{
+ /* some cases can be optimized here */
+ if (arg2 == 0) {
+ tcg_gen_mov_i32(ret, arg1);
+ } else {
+ TCGv t0, t1;
+ t0 = tcg_temp_new(TCG_TYPE_I32);
+ t1 = tcg_temp_new(TCG_TYPE_I32);
+ tcg_gen_shli_i32(t0, arg1, arg2);
+ tcg_gen_shri_i32(t1, arg1, 32 - arg2);
+ tcg_gen_or_i32(ret, t0, t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+ }
+}
+
+static inline void tcg_gen_rotli_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+ /* some cases can be optimized here */
+ if (arg2 == 0) {
+ tcg_gen_mov_i64(ret, arg1);
+ } else {
+ TCGv t0, t1;
+ t0 = tcg_temp_new(TCG_TYPE_I64);
+ t1 = tcg_temp_new(TCG_TYPE_I64);
+ tcg_gen_shli_i64(t0, arg1, arg2);
+ tcg_gen_shri_i64(t1, arg1, 64 - arg2);
+ tcg_gen_or_i64(ret, t0, t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+ }
+}
+
+static inline void tcg_gen_rotr_i32(TCGv ret, TCGv arg1, TCGv arg2)
+{
+ TCGv t0, t1;
+
+ t0 = tcg_temp_new(TCG_TYPE_I32);
+ t1 = tcg_temp_new(TCG_TYPE_I32);
+ tcg_gen_shr_i32(t0, arg1, arg2);
+ tcg_gen_subfi_i32(t1, 32, arg2);
+ tcg_gen_shl_i32(t1, arg1, t1);
+ tcg_gen_or_i32(ret, t0, t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+}
+
+static inline void tcg_gen_rotr_i64(TCGv ret, TCGv arg1, TCGv arg2)
+{
+ TCGv t0, t1;
+
+ t0 = tcg_temp_new(TCG_TYPE_I64);
+ t1 = tcg_temp_new(TCG_TYPE_I64);
+ tcg_gen_shl_i64(t0, arg1, arg2);
+ tcg_gen_subfi_i64(t1, 64, arg2);
+ tcg_gen_shl_i64(t1, arg1, t1);
+ tcg_gen_or_i64(ret, t0, t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+}
+
+static inline void tcg_gen_rotri_i32(TCGv ret, TCGv arg1, int32_t arg2)
+{
+ /* some cases can be optimized here */
+ if (arg2 == 0) {
+ tcg_gen_mov_i32(ret, arg1);
+ } else {
+ tcg_gen_rotli_i32(ret, arg1, 32 - arg2);
+ }
+}
+
+static inline void tcg_gen_rotri_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+ /* some cases can be optimized here */
+ if (arg2 == 0) {
+ tcg_gen_mov_i32(ret, arg1);
+ } else {
+ tcg_gen_rotli_i64(ret, arg1, 64 - arg2);
+ }
+}
+
/***************************************/
/* QEMU specific operations. Their type depend on the QEMU CPU
type. */
@@ -1777,6 +1887,10 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_nand_tl tcg_gen_nand_i64
#define tcg_gen_nor_tl tcg_gen_nor_i64
#define tcg_gen_orc_tl tcg_gen_orc_i64
+#define tcg_gen_rotl_tl tcg_gen_rotl_i64
+#define tcg_gen_rotli_tl tcg_gen_rotli_i64
+#define tcg_gen_rotr_tl tcg_gen_rotr_i64
+#define tcg_gen_rotri_tl tcg_gen_rotri_i64
#define tcg_const_tl tcg_const_i64
#define tcg_const_local_tl tcg_const_local_i64
#else
@@ -1836,6 +1950,10 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_nand_tl tcg_gen_nand_i32
#define tcg_gen_nor_tl tcg_gen_nor_i32
#define tcg_gen_orc_tl tcg_gen_orc_i32
+#define tcg_gen_rotl_tl tcg_gen_rotl_i32
+#define tcg_gen_rotli_tl tcg_gen_rotli_i32
+#define tcg_gen_rotr_tl tcg_gen_rotr_i32
+#define tcg_gen_rotri_tl tcg_gen_rotri_i32
#define tcg_const_tl tcg_const_i32
#define tcg_const_local_tl tcg_const_local_i32
#endif