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authorRichard Henderson <rth@twiddle.net>2014-09-02 13:59:47 -0700
committerRichard Henderson <rth@redhat.com>2014-09-29 14:55:28 -0400
commit9c53889ba3b7bda8c8e7dcee253e0a54fc4288f9 (patch)
tree0c73fc5d2774c943ebacc5c045e63312445f1b59 /tcg/tcg-be-ldst.h
parentde8301e542325fbc8accafbd8a3b50ae2554503e (diff)
downloadqemu-9c53889ba3b7bda8c8e7dcee253e0a54fc4288f9.zip
tcg-aarch64: Use 32-bit loads for qemu_ld_i32
The "old" qemu_ld opcode did not specify the size of the result, and so we had to assume full register width. With the new opcodes, we can narrow the result. Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/tcg-be-ldst.h')
-rw-r--r--tcg/tcg-be-ldst.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/tcg/tcg-be-ldst.h b/tcg/tcg-be-ldst.h
index 49b3de61ea..429cba24d4 100644
--- a/tcg/tcg-be-ldst.h
+++ b/tcg/tcg-be-ldst.h
@@ -24,8 +24,9 @@
#define TCG_MAX_QEMU_LDST 640
typedef struct TCGLabelQemuLdst {
- bool is_ld:1; /* qemu_ld: true, qemu_st: false */
- TCGMemOp opc:4;
+ bool is_ld; /* qemu_ld: true, qemu_st: false */
+ TCGMemOp opc;
+ TCGType type; /* result type of a load */
TCGReg addrlo_reg; /* reg index for low word of guest virtual addr */
TCGReg addrhi_reg; /* reg index for high word of guest virtual addr */
TCGReg datalo_reg; /* reg index for low word to be loaded or stored */