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| author | Richard Henderson <rth@twiddle.net> | 2016-10-14 14:26:40 -0500 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 08:06:10 -0800 |
| commit | b0bf5fe82df93c180f69d439af59f1f546632f13 (patch) | |
| tree | 22e2e3c8edffff18a549553c9361655d91701e7f /tcg/s390 | |
| parent | b2c98d9d392c87c9b9e975d30f79924719d9cbbe (diff) | |
| download | qemu-b0bf5fe82df93c180f69d439af59f1f546632f13.zip | |
tcg/s390: Implement field extraction opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/s390')
| -rw-r--r-- | tcg/s390/tcg-target.h | 4 | ||||
| -rw-r--r-- | tcg/s390/tcg-target.inc.c | 11 |
2 files changed, 13 insertions, 2 deletions
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index d650a72928..e9ac12e55b 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -78,7 +78,7 @@ extern uint64_t s390_facilities; #define TCG_TARGET_HAS_nand_i32 0 #define TCG_TARGET_HAS_nor_i32 0 #define TCG_TARGET_HAS_deposit_i32 (s390_facilities & FACILITY_GEN_INST_EXT) -#define TCG_TARGET_HAS_extract_i32 0 +#define TCG_TARGET_HAS_extract_i32 (s390_facilities & FACILITY_GEN_INST_EXT) #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 @@ -109,7 +109,7 @@ extern uint64_t s390_facilities; #define TCG_TARGET_HAS_nand_i64 0 #define TCG_TARGET_HAS_nor_i64 0 #define TCG_TARGET_HAS_deposit_i64 (s390_facilities & FACILITY_GEN_INST_EXT) -#define TCG_TARGET_HAS_extract_i64 0 +#define TCG_TARGET_HAS_extract_i64 (s390_facilities & FACILITY_GEN_INST_EXT) #define TCG_TARGET_HAS_sextract_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 3821378584..2faa761e78 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -1252,6 +1252,12 @@ static void tgen_deposit(TCGContext *s, TCGReg dest, TCGReg src, tcg_out_risbg(s, dest, src, msb, lsb, ofs, 0); } +static void tgen_extract(TCGContext *s, TCGReg dest, TCGReg src, + int ofs, int len) +{ + tcg_out_risbg(s, dest, src, 64 - len, 63, 64 - ofs, 1); +} + static void tgen_gotoi(TCGContext *s, int cc, tcg_insn_unit *dest) { ptrdiff_t off = dest - s->code_ptr; @@ -2158,6 +2164,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, OP_32_64(deposit): tgen_deposit(s, args[0], args[2], args[3], args[4]); break; + OP_32_64(extract): + tgen_extract(s, args[0], args[1], args[2], args[3]); + break; case INDEX_op_mb: /* The host memory model is quite strong, we simply need to @@ -2227,6 +2236,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_setcond_i32, { "r", "r", "rC" } }, { INDEX_op_movcond_i32, { "r", "r", "rC", "r", "0" } }, { INDEX_op_deposit_i32, { "r", "0", "r" } }, + { INDEX_op_extract_i32, { "r", "r" } }, { INDEX_op_qemu_ld_i32, { "r", "L" } }, { INDEX_op_qemu_ld_i64, { "r", "L" } }, @@ -2288,6 +2298,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_setcond_i64, { "r", "r", "rC" } }, { INDEX_op_movcond_i64, { "r", "r", "rC", "r", "0" } }, { INDEX_op_deposit_i64, { "r", "0", "r" } }, + { INDEX_op_extract_i64, { "r", "r" } }, { INDEX_op_mb, { } }, { -1 }, |