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| author | Richard Henderson <rth@twiddle.net> | 2016-11-16 09:23:28 +0100 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 08:06:11 -0800 |
| commit | 0e28d0063bbd9e59a981ea2d20f82f30c5d956a8 (patch) | |
| tree | 6e4a705fef28f5ffc5ab828ca9abcc13f5097927 /tcg/mips | |
| parent | 17280ff4a5f264e01e55ae514ee6d3586f9577b2 (diff) | |
| download | qemu-0e28d0063bbd9e59a981ea2d20f82f30c5d956a8.zip | |
tcg: Add clz and ctz opcodes
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/mips')
| -rw-r--r-- | tcg/mips/tcg-target.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 92d203aca8..06988cf29e 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -121,6 +121,8 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_rem_i32 1 #define TCG_TARGET_HAS_not_i32 1 #define TCG_TARGET_HAS_nor_i32 1 +#define TCG_TARGET_HAS_clz_i32 0 +#define TCG_TARGET_HAS_ctz_i32 0 #define TCG_TARGET_HAS_andc_i32 0 #define TCG_TARGET_HAS_orc_i32 0 #define TCG_TARGET_HAS_eqv_i32 0 |