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| author | Aurelien Jarno <aurelien@aurel32.net> | 2017-04-30 16:46:20 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2017-05-06 12:48:53 +0200 |
| commit | 2f5a5f5774d95baacf86c03aa8a77a2d0390f2b2 (patch) | |
| tree | 9f4864a1d5daf246eccdeed7d970e26a8e44416e /tcg/mips/tcg-target.inc.c | |
| parent | 12a95f320a36ef66f724a49bb05e4fb553ac5dbe (diff) | |
| download | qemu-2f5a5f5774d95baacf86c03aa8a77a2d0390f2b2.zip | |
tcg/mips: fix field extraction opcode
The "msb" argument should correspond to (len - 1).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/mips/tcg-target.inc.c')
| -rw-r--r-- | tcg/mips/tcg-target.inc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 01ac7b2c81..2a7e1c7f5b 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -2093,11 +2093,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, args[3] + args[4] - 1, args[3]); break; case INDEX_op_extract_i32: - tcg_out_opc_bf(s, OPC_EXT, a0, a1, a2 + args[3] - 1, a2); + tcg_out_opc_bf(s, OPC_EXT, a0, a1, args[3] - 1, a2); break; case INDEX_op_extract_i64: tcg_out_opc_bf64(s, OPC_DEXT, OPC_DEXTM, OPC_DEXTU, a0, a1, - a2 + args[3] - 1, a2); + args[3] - 1, a2); break; case INDEX_op_brcond_i32: |