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author | Peter Maydell <peter.maydell@linaro.org> | 2013-01-17 20:04:16 +0000 |
---|---|---|
committer | Blue Swirl <blauwirbel@gmail.com> | 2013-01-19 10:27:45 +0000 |
commit | 5256a7208a7c2af19baf8f99bd4f06632f9f9ba9 (patch) | |
tree | a5fae55f56cc5751c6504930efecdb5163329c4d /tcg/arm | |
parent | e4ada482420175bc17d6ccb9f2af0e769da78e01 (diff) | |
download | qemu-5256a7208a7c2af19baf8f99bd4f06632f9f9ba9.zip |
tcg/target-arm: Add missing parens to assertions
Silence a (legitimate) complaint about missing parentheses:
tcg/arm/tcg-target.c: In function ‘tcg_out_qemu_ld’:
tcg/arm/tcg-target.c:1148:5: error: suggest parentheses around
comparison in operand of ‘&’ [-Werror=parentheses]
tcg/arm/tcg-target.c: In function ‘tcg_out_qemu_st’:
tcg/arm/tcg-target.c:1357:5: error: suggest parentheses around
comparison in operand of ‘&’ [-Werror=parentheses]
which meant that we would mistakenly always assert if running
a QEMU built with debug enabled on ARM.
Signed-off-by: Peter Maydell <peter.maydelL@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/arm')
-rw-r--r-- | tcg/arm/tcg-target.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index c3ac85e054..d9c33d850f 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -1145,7 +1145,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc) TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS)); /* We assume that the offset is contained within 20 bits. */ tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_read); - assert(tlb_offset & ~0xfffff == 0); + assert((tlb_offset & ~0xfffff) == 0); if (tlb_offset > 0xfff) { tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0, 0xa00 | (tlb_offset >> 12)); @@ -1354,7 +1354,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc) TCG_AREG0, TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS)); /* We assume that the offset is contained within 20 bits. */ tlb_offset = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write); - assert(tlb_offset & ~0xfffff == 0); + assert((tlb_offset & ~0xfffff) == 0); if (tlb_offset > 0xfff) { tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R0, TCG_REG_R0, 0xa00 | (tlb_offset >> 12)); |