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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-09-03 15:56:24 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-10-08 05:57:32 -0500 |
| commit | 74a117906b87ff9220e4baae5a7431d6f4eadd45 (patch) | |
| tree | d99fbe2a152523b0dd5b73fbd22e46aa2bdfd7cf /tcg/aarch64 | |
| parent | 66792f90f14fef18b25a168922877a367ecdca05 (diff) | |
| download | qemu-74a117906b87ff9220e4baae5a7431d6f4eadd45.zip | |
tcg: Remove TCG_CT_REG
This wasn't actually used for anything, really. All variable
operands must accept registers, and which are indicated by the
set in TCGArgConstraint.regs.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/aarch64')
| -rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index dbe5c6a14c..26f71cb599 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -128,15 +128,12 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, { switch (*ct_str++) { case 'r': /* general registers */ - ct->ct |= TCG_CT_REG; ct->regs |= 0xffffffffu; break; case 'w': /* advsimd registers */ - ct->ct |= TCG_CT_REG; ct->regs |= 0xffffffff00000000ull; break; case 'l': /* qemu_ld / qemu_st address, data_reg */ - ct->ct |= TCG_CT_REG; ct->regs = 0xffffffffu; #ifdef CONFIG_SOFTMMU /* x0 and x1 will be overwritten when reading the tlb entry, |