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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-08-08 13:26:13 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-08-16 14:02:53 +0100 |
| commit | dd861b3f29be97a9e3cdb9769dcbc0c7d7825185 (patch) | |
| tree | 12f50b7a9a2f1fca52ec516c966348a5884c932c /target | |
| parent | 464eaa9571fae5867d9aea7d7209c091c8a50223 (diff) | |
| download | qemu-dd861b3f29be97a9e3cdb9769dcbc0c7d7825185.zip | |
target/arm: Use ror32 instead of open-coding the operation
The helper function is more documentary, and also already
handles the case of rotate by zero.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190808202616.13782-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/translate.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index ebc7c67f02..02ce8d44fa 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7964,8 +7964,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) /* CPSR = immediate */ val = insn & 0xff; shift = ((insn >> 8) & 0xf) * 2; - if (shift) - val = (val >> shift) | (val << (32 - shift)); + val = ror32(val, shift); i = ((insn & (1 << 22)) != 0); if (gen_set_psr_im(s, msr_mask(s, (insn >> 16) & 0xf, i), i, val)) { @@ -8228,9 +8227,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) /* immediate operand */ val = insn & 0xff; shift = ((insn >> 8) & 0xf) * 2; - if (shift) { - val = (val >> shift) | (val << (32 - shift)); - } + val = ror32(val, shift); tmp2 = tcg_temp_new_i32(); tcg_gen_movi_i32(tmp2, val); if (logic_cc && shift) { |