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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-04-19 13:22:44 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-04-30 11:16:51 +0100 |
| commit | c0c7f66087b193303bf9afe6e5e675fd02a17e12 (patch) | |
| tree | 52525457ccba2cef45d70fb8b0a754082d068882 /target | |
| parent | 2e1f39e29bf9a6b28eaee9fc0949aab50dbad94a (diff) | |
| download | qemu-c0c7f66087b193303bf9afe6e5e675fd02a17e12.zip | |
target/arm: Enforce alignment for RFE
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210419202257.161730-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index 9095c4a86f..b8704d2504 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8357,10 +8357,10 @@ static bool trans_RFE(DisasContext *s, arg_RFE *a) /* Load PC into tmp and CPSR into tmp2. */ t1 = tcg_temp_new_i32(); - gen_aa32_ld32u(s, t1, addr, get_mem_index(s)); + gen_aa32_ld_i32(s, t1, addr, get_mem_index(s), MO_UL | MO_ALIGN); tcg_gen_addi_i32(addr, addr, 4); t2 = tcg_temp_new_i32(); - gen_aa32_ld32u(s, t2, addr, get_mem_index(s)); + gen_aa32_ld_i32(s, t2, addr, get_mem_index(s), MO_UL | MO_ALIGN); if (a->w) { /* Base writeback. */ |