diff options
author | Janosch Frank <frankja@linux.ibm.com> | 2020-02-27 04:23:41 -0500 |
---|---|---|
committer | Cornelia Huck <cohuck@redhat.com> | 2020-02-27 11:10:29 +0100 |
commit | b6c2dbd7214b0b2396e1dcf9668c8b48ab571115 (patch) | |
tree | 55390292b9010d854914d5d329b60b67b09fea76 /target | |
parent | 8f4335242a2ed7862363ff3bf08d0dfc3c3098e7 (diff) | |
download | qemu-b6c2dbd7214b0b2396e1dcf9668c8b48ab571115.zip |
s390x: Rename and use constants for short PSW address and mask
Let's rename PSW_MASK_ESA_ADDR to PSW_MASK_SHORT_ADDR because we're
not working with a ESA PSW which would not support the extended
addressing bit. Also let's actually use it.
Additionally we introduce PSW_MASK_SHORT_CTRL and use it throughout
the codebase.
Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200227092341.38558-1-frankja@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target')
-rw-r--r-- | target/s390x/cpu.c | 4 | ||||
-rw-r--r-- | target/s390x/cpu.h | 3 |
2 files changed, 4 insertions, 3 deletions
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 8da1905485..3dd396e870 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -78,13 +78,13 @@ static void s390_cpu_load_normal(CPUState *s) S390CPU *cpu = S390_CPU(s); uint64_t spsw = ldq_phys(s->as, 0); - cpu->env.psw.mask = spsw & 0xffffffff80000000ULL; + cpu->env.psw.mask = spsw & PSW_MASK_SHORT_CTRL; /* * Invert short psw indication, so SIE will report a specification * exception if it was not set. */ cpu->env.psw.mask ^= PSW_MASK_SHORTPSW; - cpu->env.psw.addr = spsw & 0x7fffffffULL; + cpu->env.psw.addr = spsw & PSW_MASK_SHORT_ADDR; s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu); } diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 8a557fd8d1..1d17709d6e 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -276,7 +276,8 @@ extern const VMStateDescription vmstate_s390_cpu; #define PSW_MASK_RI 0x0000008000000000ULL #define PSW_MASK_64 0x0000000100000000ULL #define PSW_MASK_32 0x0000000080000000ULL -#define PSW_MASK_ESA_ADDR 0x000000007fffffffULL +#define PSW_MASK_SHORT_ADDR 0x000000007fffffffULL +#define PSW_MASK_SHORT_CTRL 0xffffffff80000000ULL #undef PSW_ASC_PRIMARY #undef PSW_ASC_ACCREG |