diff options
| author | Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> | 2021-05-21 17:17:52 -0300 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-06-03 13:22:06 +1000 |
| commit | a3f5c315396b86468487f303a044b26801015090 (patch) | |
| tree | 0525a41b85a4752e9393e243342c733b8cae5efa /target | |
| parent | dbf2e70a3029890f4c7c426f4eb724bac78d8c54 (diff) | |
| download | qemu-a3f5c315396b86468487f303a044b26801015090.zip | |
target/ppc: moved ppc_store_lpcr and ppc_store_msr to cpu.c
These functions are used in hw/ppc logic, during machine startup, which
means it must be compiled when --disable-tcg is selected, and so it has
been moved into a common code file
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20210521201759.85475-3-bruno.larsen@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/cpu.c | 17 | ||||
| -rw-r--r-- | target/ppc/misc_helper.c | 16 |
2 files changed, 17 insertions, 16 deletions
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index 9cf3288b7a..c8e87e30f1 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -24,6 +24,7 @@ #include "exec/log.h" #include "fpu/softfloat-helpers.h" #include "mmu-hash64.h" +#include "helper_regs.h" target_ulong cpu_read_xer(CPUPPCState *env) { @@ -92,3 +93,19 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value) env->spr[SPR_SDR1] = value; } #endif /* CONFIG_SOFTMMU */ + +/* GDBstub can read and write MSR... */ +void ppc_store_msr(CPUPPCState *env, target_ulong value) +{ + hreg_store_msr(env, value, 0); +} + +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) +{ + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + CPUPPCState *env = &cpu->env; + + env->spr[SPR_LPCR] = val & pcc->lpcr_mask; + /* The gtse bit affects hflags */ + hreg_compute_hflags(env); +} diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 08a31da289..442b12652c 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -255,22 +255,6 @@ target_ulong helper_clcs(CPUPPCState *env, uint32_t arg) /*****************************************************************************/ /* Special registers manipulation */ -/* GDBstub can read and write MSR... */ -void ppc_store_msr(CPUPPCState *env, target_ulong value) -{ - hreg_store_msr(env, value, 0); -} - -void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) -{ - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); - CPUPPCState *env = &cpu->env; - - env->spr[SPR_LPCR] = val & pcc->lpcr_mask; - /* The gtse bit affects hflags */ - hreg_compute_hflags(env); -} - /* * This code is lifted from MacOnLinux. It is called whenever THRM1,2 * or 3 is read an fixes up the values in such a way that will make |